Embedded Computing for High Performance

Efficient Mapping of Computations Using Customization, Code Transformations and Compilation
Erscheinungsjahr 2017
ISBN: 978-0-12-804189-5
Verlag: Elsevier Science

Buch, Englisch, 320 Seiten, Format (B × H): 192 mm x 234 mm, Gewicht: 672 g

Embedded Computing for High Performance: Design Exploration and Customization Using High-level Compilation and Synthesis Tools provides a set of real-life example implementations that migrate traditional desktop systems to embedded systems. Working with popular hardware, including Xilinx and ARM, the book offers a comprehensive description of techniques for mapping computations expressed in programming languages such as C or MATLAB to high-performance embedded architectures consisting of multiple CPUs, GPUs, and reconfigurable hardware (FPGAs).

The authors demonstrate a domain-specific language (LARA) that facilitates retargeting to multiple computing systems using the same source code. In this way, users can decouple original application code from transformed code and enhance productivity and program portability.

After reading this book, engineers will understand the processes, methodologies, and best practices needed for the development of applications for high-performance embedded computing systems.

Autoren/Hrsg.

Cardoso, João Manuel Paiva

Coutinho, José Gabriel de Figueiredo

Diniz, Pedro C

Fachgebiete

• Mathematik | Informatik EDV | Informatik Technische Informatik Eingebettete Systeme
• Mathematik | Informatik EDV | Informatik Technische Informatik Hochleistungsrechnen, Supercomputer

Inhaltsverzeichnis

1. Introduction2. High Performance Embedded Computing3. Controlling the Design and Development Cycle4. Source Code Analysis and Instrumentation5. Source Code Transformations and Optimizations6. Compiler Optimizations7. Code Retargeting8. Advanced Topics

Über Autor(innen)

Cardoso, João Manuel Paiva
João Manuel Paiva Cardoso, Associate Professor, Department of Informatics Engineering (DEI), Faculty of Engineering, University of Porto, Portugal. Previously I was Assistant Professor in the Department of Computer Science and Engineering, Instituto Superior Técnico (IST), Technical University of Lisbon (UTL), in Lisbon (April 4, 2006- Sept. 3, 2008), and Assistant Professor (2001-2006) in the Department of Electronics and Informatics Engineering (DEEI), Faculty of Sciences and Technology, at the University of Algarve, and Teaching Assistant in the same university (1993-2001). I have been a senior researcher at INESC-ID (Systems and Computer Engineering Institute) in Lisbon. I was member of INESC-ID from 1994 to 2009.

Coutinho, José Gabriel de Figueiredo
José Gabriel de Figueiredo Coutinho, Research Associate, Imperial College. He is involved in the EU FP7 HARNESS project to intergrate heterogeneous hardware and network technologies into data centre platforms, to vastly increase performance, reduce energy consumption, and lower cost profiles for important and high-value cloud applications such as real-time business analytics and the geosciences. His research interests include database functionality on heterogeneous systems, cloud computing resource management, and performance-driven mapping strategies.

Diniz, Pedro C
Pedro C. Diniz received his M.Sc. in Electrical and Computer Engineering from the Technical University in Lisbon, Portugal and his Ph.D. from the University of California, Santa Barbara in Computer Science in 1997. Since 1997 he has been a researcher with the University of Southern California's Information Sciences Institute (USC/ISI) and an Assistant Professor of Computer Science at the University of Southern California in Los Angeles, California. He has lead and participated in many research projects funded by the U.S. government and the European Union (UE) and has authored or co-authored many internationally recognized scientific journal papers and over 100 international conference papers. Over the years he has been heavily involved in the scientific community in the area of high-performance computing, reconfigurable and field-programmable computing.