Handbook of Computer Architecture

2025
ISBN: 978-981-97-9313-6
Verlag: Springer Nature Singapore

Buch, Englisch, 1471 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 2854 g

This handbook presents the key topics in the area of computer architecture covering from the basic to the most advanced topics, including software and hardware design methodologies. It will provide readers with the most comprehensive updated reference information covering applications in single core processors, multicore processors, application-specific processors, reconfigurable architectures, emerging computing architectures, processor design and programming flows, test and verification. This information benefits the readers as a full and quick technical reference with a high-level review of computer architecture technology, detailed technical descriptions and the latest practical applications.

Zielgruppe

Research

Autoren/Hrsg.

Chattopadhyay, Anupam

Fachgebiete

• Mathematik | Informatik Mathematik Numerik und Wissenschaftliches Rechnen Angewandte Mathematik, Mathematische Modelle
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur

Inhaltsverzeichnis

Single Core Processors.- Application-Specific Processors.- Multicore and Reconfigurable Architectures.- Emerging Computing Architectures.- Processor Design and Programming Flows.- Test and Verification.

Über Autor(innen)

Anupam Chattopadhyay received his B.E. degree from Jadavpur University, India, MSc. from ALaRI, Switzerland and PhD from RWTH Aachen in 2000, 2002 and 2008 respectively. From 2008 to 2009, he worked as a Member of Consulting Staff in CoWare R&D, Noida, India. From 2010 to 2014, he led the MPSoC Architectures Research Group in RWTH Aachen, Germany as a Junior Professor. Since 2014, he is with the College of Computing and Data Science (CCDS), Nanyang Technological University (NTU), where he is currently appointed as an Associate Professor, and also holds a courtesy appointment at SPMS, NTU. In the past, he held visiting positions at Politecnico di Torino, Italy; EPFL, Switzerland; Technion, Israel; Kyoto University, Japan and Indian Statistical Institute, Kolkata. During his doctoral studies, he worked on automatic RTL generation from the architecture description language LISA, which led to a spin-off, and subsequently was acquired by a leading EDA vendor. He developed novel high-level optimisations, verification techniques, and proposed a language-based modelling, exploration and design framework for partially re-configurable processors - many of which resulted in successful technology transfers to the EDA and Semiconductor IP industry.

Anupam currently heads a team of 20+ researchers, overseeing projects in the area of computer architectures, security, design automation and emerging technologies. His research advances has been reported in more than 250 conference/journal papers (ACM/IEEE/Springer), multiple research monographs and edited books (CRC, Springer) and open-access forums. Anupam’s research in the area of emerging technologies has been covered by major news outlets across the world, including Asian Scientist, Straits Times and The Economist. Anupam regularly serves in the TPCs of top conferences, reviews journal/ conference articles and presented multiple invited seminars/tutorials in prestigious venues. He is a series editor of Springer book series on Computer Architecture and Design Methodologies. He is a senior member of ACM and IEEE. Anupam received Borcher's plaque from RWTH Aachen, Germany for outstanding doctoral dissertation in 2008, nomination for the best IP award in the ACM/IEEE DATE Conference 2016 and nomination for the best paper award in the International Conference on VLSI Design 2018 and 2020.