Principles of VLSI RTL Design

A Practical Guide
1. Auflage 2011
ISBN: 978-1-4419-9295-6
Verlag: Springer

Buch, Englisch, 182 Seiten, Format (B × H): 162 mm x 245 mm, Gewicht: 430 g

Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are a function of the way the RTL was originally written.  Readers will benefit from a highly practical approach to the fundamentals of these topics, and will be given clear guidance regarding necessary safeguards to observe during RTL design.

Zielgruppe

Research

Autoren/Hrsg.

Churiwala, Sanjay

Garg, Sapan

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Schaltungsentwurf
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren

Inhaltsverzeichnis

Introduction to RTL Designs; Ensuring RTL Intent; Static Timing Analysis (STA); Clock Domain Crossing (CDC); Power; Design for Test; Timing Exceptions; Congestion; Conclusions.