Bsim-Soi Industry-Standard Compact Model

Surface Potential-Based Fet Model for Rfic Design
Erscheinungsjahr 2026
ISBN: 978-0-443-43904-9
Verlag: Elsevier Science

Buch, Englisch, 350 Seiten, Format (B × H): 152 mm x 229 mm

This book provides complete coverage of compact modeling and design techniques specific to silicon-on-insulator (SOI) transistors. It is the first comprehensive guide that thoroughly explains the industry-standard surface-potential-based BSIM-SOI compact model (BSIM-SOI 100 series), contrasting it with the legacy threshold-voltage-based BSIM-SOI model (BSIM-SOI 4 series), and provides unique modeling and RF design techniques necessary for the accurate extraction and implementation of the model.

BSIM-SOI is the most widely used compact model for SOI MOSFETs in the semiconductor industry. This book aims to equip designers, engineers, and researchers with the knowledge and tools required to optimize SOI-based RF technology, circuit performance, and system integration using BSIM-SOI. The book explains the fundamental surface-potential calculations and addresses various real device effects (such as floating body effect, self-heating effect, dynamic depletion effect, nonlinear body resistance effect, noise, and various leakages, etc.) and layout influences to accurately replicate realistic device behavior. Additionally, it outlines step-by-step parameter extraction procedures for the BSIM-SOI model and presents results from benchmark circuit validations with a primary focus on RF SoC applications.

This book will be a valuable reference for the expanding field of SOI technology, catering specifically to circuit designers, device engineers, academic researchers, and students.

Autoren/Hrsg.

Dabhi, Chetan Kumar

Nandi, Debashish

Rajasekharan, Dinesh

Hu, Chenming

Chauhan, Yogesh Singh

Sundaram, Ananth

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Geisteswissenschaften Design Produktdesign, Industriedesign
• Naturwissenschaften Physik Quantenphysik
• Technische Wissenschaften Maschinenbau | Werkstoffkunde Technische Mechanik | Werkstoffkunde

Inhaltsverzeichnis

1. General overview of SOI models and technology trends
2. Core model formulation
3. Real device effects
4. Terminal charges and capacitances
5. Leakage currents
6. Noise models in BSIM-SOI
7. Body contact parasitics – modeling approach
8. Self-Heating and Temperature Effects
9. Cutting-Edge RF Modeling and Validation Techniques
10. Integrating BSIM-SOI Models in Analog, Digital, and RF Designs
11. Parameter Extraction
12. Model Quality testing

Über Autor(innen)

Rajasekharan, Dinesh
Dinesh Rajasekharan is a Postdoctoral Researcher in the BSIM group at the University of California Berkeley, United States. His research covers semiconductor device compact model development, neuromorphic computing using emerging semiconductor devices, and using neural networks in electronics applications.

Dabhi, Chetan Kumar
Chetan Kumar Dabhi is a Staff Engineer at pSemi Corporation, San Diego, United States. He specializes in developing and supporting industry-standard compact models for diverse semiconductor devices, including SOI FETs, FinFETs, and Bulk FETs (BSIM-SOI, BSIM-IMG, BSIM-BULK, and BSIM4).

Hu, Chenming
Chenming Hu is TSMC Distinguished Chair Professor Emeritus at the University of California Berkeley, United States. He was the Chief Technology Officer of TSMC. He received the US Presidential Medal of Technology and Innovation from Pres. Barack Obama for developing the first 3D thin-body transistor FinFET, MOSFET reliability models and leading the development of BSIM industry standard transistor model that is used in designing most of the integrated circuits in the world. He is a member of the US Academy of Engineering, the Chinese Academy of Science, and Academia Sinica. He received the highest honor of IEEE, the IEEE Medal of Honor, and its Andrew Grove Award, Solid Circuits Award, and the Nishizawa Medal. He also received the Taiwan Presidential Science Prize and UC Berkeley’s highest honor for teaching – the Berkeley Distinguished Teaching Award.

Nandi, Debashish
Debashish Nandi is a Researcher in the Department of Electrical Engineering at the Indian Institute of Technology Kanpur, India. His research focuses on compact modelling and device characterization of various nanoscale devices, primarily SOI MOSFETs for RF applications for advanced communication standards like 5G and 6G.

Chauhan, Yogesh Singh
Yogesh Singh Chauhan is a Chair Professor in the Department of Electrical Engineering at the Indian Institute of Technology Kanpur, India. He is the developer of several industry standard models: ASM-HEMT, BSIM-BULK (formerly BSIM6), BSIM-CMG, BSIM-IMG, BSIM4 and BSIM-SOI models. His research group is involved in developing compact models for GaN transistors, FinFET, nanosheet/gate-all-around FETs, FDSOI transistors, negative capacitance FETs and 2D FETs. His research interests are RF characterization, modeling, and simulation of semiconductor devices.

Sundaram, Ananth
Ananth Sundaram is a Deputy Director at GlobalFoundries, Bengaluru, India. He is a technology professional with experience in semiconductor modeling, design, and measurement.