Dally / Harting | Digital Design | Buch | 978-0-521-19950-6 | www.sack.de

Buch, Englisch, 636 Seiten, Format (B × H): 196 mm x 241 mm, Gewicht: 1363 g

Dally / Harting

Digital Design


Erscheinungsjahr 2012
ISBN: 978-0-521-19950-6
Verlag: Cambridge University Press

Buch, Englisch, 636 Seiten, Format (B × H): 196 mm x 241 mm, Gewicht: 1363 g

ISBN: 978-0-521-19950-6
Verlag: Cambridge University Press


This introductory textbook provides students with a system-level perspective and the tools they need to understand, analyze and design digital systems. Going beyond the design of simple combinational and sequential modules, it shows how such modules are used to build complete systems, reflecting real-world digital design. All the essential topics are covered, including design and analysis of combinational and sequential modules, as well as system timing and synchronization. It also teaches how to write Verilog HDL in a productive and maintainable style that enables CAD tools to do much of the tedious work. A complete introduction to digital design is given through clear explanations, extensive examples and online Verilog files. The teaching package is completed with lecture slides, labs and a solutions manual for instructors. Assuming no previous digital knowledge, this textbook is ideal for undergraduate digital design courses that will prepare students for modern digital practice.

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Part I. Introduction: 1. The digital abstraction; 2. The practice of digital system design; Part II. Combinational Logic: 3. Boolean algebra; 4. CMOS logic circuits; 5. Delay and power of CMOS circuits; 6. Combinational logic design; 7. Verilog descriptions of combinational logic; 8. Combinational building blocks; 9. Combinational examples; Part III. Arithmetic Circuits: 10. Arithmetic circuits; 11. Fixed- and floating-point numbers; 12. Fast arithmetic circuits; 13. Arithmetic examples; Part IV. Synchronous Sequential Logic: 14. Sequential logic; 15. Timing constraints; 16. Datapath sequential logic; 17. Factoring finite-state machines; 18. Microcode; 19. Sequential examples; Part V. Practical Design: 20. Verification and test; Part VI. System Design: 21. System-level design; 22. Interface and system-level timing; 23. Pipelines; 24. Interconnect; 25. Memory systems; Part VII. Asynchronous Logic: 26. Asynchronous sequential circuits; 27. Flip-flops; 28. Metastability and synchronization failure; 29. Synchronizer design; Appendix A. Verilog coding style; References; Index of Verilog modules; Subject index.


Harting, R. Curtis
R. Curtis Harting is a PhD candidate at Stanford University. He graduated with honors in 2007 from Duke University with a BSE, majoring in Electrical and Computer Engineering and Computer Science. He received his MS in 2009 from Stanford University. His primary research interest is in computer architecture, focusing on parallel, high-performance and energy-efficient design.

Dally, William J.
William James Dally is the Willard R. and Inez Kerr Bell Professor of Engineering at Stanford University and Chief Scientist at NVIDIA Corporation. He and his group have developed system architecture, network architecture, signaling, routing and synchronization technology that can be found in most large parallel computers today. He has many years of experience working in industry and academia, previously holding positions at Bell Labs, Caltech and MIT and consulting for Digital Equipment, Cray Research and Intel. He is a Member of the National Academy of Engineering, a Fellow of the IEEE, a Fellow of the ACM and a Fellow of the American Academy of Arts and Sciences. He has received numerous honors including the ACM Eckert–Mauchly Award, the IEEE Seymour Cray Award and the ACM Maurice Wilkes Award. He has published over 200 papers in these areas, holds over 75 issued patents and is an author of the textbooks Digital Systems Engineering and Principles and Practices of Interconnection Networks.



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