Buch, Englisch, 224 Seiten
Dynamic Random-Access Memory
Buch, Englisch, 224 Seiten
ISBN: 978-1-83669-103-7
Verlag: Wiley
Memory, the second function of a computer, has gradually become more complex in order to meet growing needs in terms of capacity, speed, security and energy efficiency. It takes the form of a component or system, such as a memory subassembly or a mass storage device.
For several decades, there has been a strong trend towards integrating memory directly into the processor under the term embedded memory, of which cache memory is a typical example. Understanding its internal mechanisms and interfacing is essential for mastering the operation of a computer and programming it efficiently.
Computer Memories 3 focuses on asynchronous dynamic random-access memory (DRAM). It examines the memory cell, then the internal organization of a generic memory, before delving into detail regarding the associated component known as DRAM. This book also presents the various access modes and advanced approaches such as embedded memory, 3D cells and capacitance-free cells.
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Weitere Infos & Material
Quotation vii
Preface ix
Introduction xiii
Chapter 1. The Dynamic Storage Cell 1
1.1. Reminder 1
1.2. Storage principle 1
1.3. Cell structures 6
1.4. Storage capacitor 14
1.5. Leakage currents 14
1.6. Conclusion 16
Chapter 2. Internal Organization of an Asynchronous Dynamic Random-Access Memory 17
2.1. General organization 17
2.2. Memory-array structures 23
2.3. Sense amplifier 35
2.4. Input/output logic 40
2.5. Basic operations 41
2.6. Conclusion 44
Chapter 3. Packaged Asynchronous Dynamic Random-Access Memory 47
3.1. External interface 47
3.2. Operation 48
3.2.1. Data access modes 48
3.2.2. Refresh 55
3.2.3. Asynchronous dynamic memory controller 66
3.3. Packaging 71
3.3.1. Integrated circuit packages 71
3.3.2. Memory modules 72
3.3.3. Detection of characteristics 73
3.4. Classification 75
3.5. Conclusion 79
Chapter 4. Asynchronous Models 81
4.1. Quartet mode 81
4.2. Page access modes 84
4.2.1. Static column mode 89
4.2.2. Fast page mode 97
4.2.3. Hyperpage mode or EDO page mode 97
4.2.4. Burst EDO page mode 104
4.3. Internal steps 110
4.4. Conclusion 114
Chapter 5. Advanced Approaches 115
5.1. Asynchronous multibank approach 115
5.2. Embedded memories 116
5.3. Three-dimensional structures 118
5.4. Capacitorless dynamic memories 120
5.4.1. Exploitation of the floating body 120
5.4.2. Derived or other principles 125
5.5. Multilevel cell 125
5.6. Conclusion 129
Conclusion 131
Appendix 137
List of Acronyms 141
References 157
Index 175
