Buch, Englisch, 250 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 1260 g
Buch, Englisch, 250 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 1260 g
ISBN: 978-1-4020-7721-0
Verlag: Springer US
Advanced Formal Verification shows the latest developments in the verification domain from the perspectives of the user and the developer. World leading experts describe the underlying methods of today's verification tools and describe various scenarios from industrial practice. In the first part of the book the core techniques of today's formal verification tools, such as SAT and BDDs are addressed. In addition, multipliers, which are known to be difficult, are studied. The second part gives insight in professional tools and the underlying methodology, such as property checking and assertion based verification. Finally, analog components have to be considered to cope with complete system on chip designs.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
- Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
- Mathematik | Informatik EDV | Informatik Technische Informatik Systemverwaltung & Management
- Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
- Mathematik | Informatik EDV | Informatik Informatik Logik, formale Sprachen, Automaten
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
- Mathematik | Informatik EDV | Informatik Angewandte Informatik Computeranwendungen in Wissenschaft & Technologie
- Technische Wissenschaften Technik Allgemein Computeranwendungen in der Technik
- Geisteswissenschaften Design Produktdesign, Industriedesign
Weitere Infos & Material
What SAT-solvers Can and Cannot Do.- Advancements in Mixed BDD and SAT Techniques.- Equivalence Checking of Arithmetic Circuits.- Application of Property Checking and Underlying Techniques.- Assertion-Based Verification.- Formal Verification for Nonlinear Analog Systems: Approaches to Model and Equivalence Checking.
