Duvvury / Gossner / Shrivastava | High Current ESD | Buch | 978-1-107-08905-1 | www.sack.de

Buch, Englisch, 250 Seiten

Duvvury / Gossner / Shrivastava

High Current ESD

Physics and Design
Erscheinungsjahr 2026
ISBN: 978-1-107-08905-1
Verlag: Cambridge University Press

Physics and Design

Buch, Englisch, 250 Seiten

ISBN: 978-1-107-08905-1
Verlag: Cambridge University Press


Synthesizing experience from industry and academia, this book offers a comprehensive and nuanced perspective on the physics of electrostatic discharge (ESD) phenomena in a range of semiconductor device technologies, illustrating robust design practices. Starting with fundamental insights into high-current ESD behavior in semiconductor devices, it gradually builds toward practical design principles and real-world reliability challenges in advanced complementary metal oxide semiconductor (CMOS), fin field-effect transistor (FinFETs), gallium nitride high-electron-mobility transistors (GaN HEMTs), carbon nanostructures, and thin film transistor (TFT) technologies. Device-level physics and practical design implications are explored throughout, bridging the gap between deep theoretical understanding and real-world design constraints. Including unique simulation techniques alongside experimental results, this book thoroughly explores core ESD design principles. Including multiple curated case studies, this book will equip readers with all the tools needed to address current ESD design challenges and embrace the challenges of the future. A reliable and thought-provoking exploration, this book will be ideal for graduate students, industry professionals, and researchers working in device physics, design, and reliability.

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Weitere Infos & Material


Preface; 1. Introduction; 2. ESD characterization methods; 3. Process technology impact; 4. Design of ESD protection devices; High current ESD behaviour; 6. Advance IO ESD design; 7. ULSI CMOS technologies; 8. ESD basics of AIGaN/GaN HEMTs; 9. Basics of 1D/2D materials, thin film transistors and their ESD failures; 10. Challenges in novel packaging technologies.


Gossner, Harald
Harald Gossner is a Senior Principal Engineer at Intel and an IEEE Fellow in the field of ESD. He is the recipient of the Outstanding Contributions Award of the EOS/ESD Association for his contributions to the field of ESD. He is the cofounder and co-chair of the Industry Council on ESD Target Levels.

Duvvury, Charvaka
Charvaka Duvvury is a Texas Instruments Fellow-Emeritus and a Life Fellow of the Institute of Electrical and Electronics Engineers (IEEEs). He received the Education Award from IEEE Electron Devices Society (EDS) and the Outstanding Contributions Award from the Electrical Overstress (EOS)/ESD Association. He is a cofounder and co-chair of the Industry Council on ESD Target Levels.

Shrivastava, Mayank
Mayank Shrivastava is the Professor & Chair of the Department of Electronic Systems Engineering at the Indian Institute of Science, Bangalore, and an IEEE Fellow. He is also the cofounder of a deep-tech semiconductor startup and is an internationally recognized leader in semiconductor technology with over 290 publications, over 65 patents, and more than 25 prestigious awards.



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