Network Processors

Architecture, Programming, and Implementation
Erscheinungsjahr 2008
ISBN: 978-0-12-370891-5
Verlag: Elsevier Science

Buch, Englisch, 736 Seiten, Format (B × H): 196 mm x 241 mm, Gewicht: 1383 g

Network processors are the basic building blocks of today's high-speed, high-demand, quality-oriented communication networks. Designing and implementing network processors requires a new programming paradigm and an in-depth understanding of network processing requirements. This book leads the reader through the requirements and the underlying theory of networks, network processing, and network processors. It covers implementation of network processors and intergrates EZchip Microcode Development Environment so that you can gain hands-on experience in writing high-speed networking applications. By the end of the book, the reader will be able to write and test applications on a simulated network processor.

Zielgruppe

PRIMARY- Industry practitioners; systems engineers, architects, product managers and software engineers from communication systems vendors, telecommunications carriers and service providers; application developers and R&D level engineers that need high-speed networking solutions, for example in defense and intelligence communities.

SECONDARY- Text for undergraduate and graduate level courses on Network Processors and on high-speed networking; reference for researchers.

Autoren/Hrsg.

Giladi, Ran

Fachgebiete

• Mathematik | Informatik EDV | Informatik Computerkommunikation & -vernetzung
• Technische Wissenschaften Elektronik | Nachrichtentechnik Nachrichten- und Kommunikationstechnik Optische Nachrichtentechnik

Inhaltsverzeichnis

CHAPTER 1 Introduction and Motivation

PART 1 Networks CHAPTER 2 Networking Fundamentals CHAPTER 3 Converged Networks CHAPTER 4 Access and Home Networks

PART 2 Processing CHAPTER 5 Packet Processing CHAPTER 6 Packet Flow Handling CHAPTER 7 Architecture CHAPTER 8 Software CHAPTER 9 NP Peripherals

PART 3 A Network Processor: EZchip CHAPTER 10 EZchip Architecture, Capabilities, and Applications CHAPTER 11 EZchip Programming CHAPTER 12 Parsing CHAPTER 13 Searching CHAPTER 14 Resolving CHAPTER 15 Modifying CHAPTER 16 Running the Virtual Local Area Network Example CHAPTER 17 Writing Your First High-Speed Network Application

List of Acronyms

Über Autor(innen)

Giladi, Ran
Ran Giladi is an associate professor in the department of Communication Systems Engineering at Ben-Gurion University of the Negev, Beer Sheva; he founded the department and has headed it for several years. In addition, he has taught in the Electrical Engineering Department and the Business School at Tel-Aviv University. Dr. Giladi has also been a system programmer, an R&D manager, a VP of R&D, and founder and CEO of several data communication companies. He is involved in the Israeli high-tech industry, serves as a board member in several companies (among them EZchip Technologies, a leading vendor of network processors), and is currently a venture partner with DFJ-TFV. His research interests include computer and communications systems performance, data and telecom networks, and network management systems. Dr. Giladi received a B.A. in physics, an M.Sc. in biomedical engineering from the Technion, and a Ph.D. in information systems from Tel-Aviv University.