Iranmanesh | Frontiers of Quality Electronic Design (QED) | Buch | 978-3-031-16346-3 | www.sack.de

Buch, Englisch, 679 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 1042 g

Iranmanesh

Frontiers of Quality Electronic Design (QED)

AI, IoT and Hardware Security
1. Auflage 2023
ISBN: 978-3-031-16346-3
Verlag: Springer

AI, IoT and Hardware Security

Buch, Englisch, 679 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 1042 g

ISBN: 978-3-031-16346-3
Verlag: Springer


Quality Electronic Design (QED)’s landscape spans a vast region where territories of many participating disciplines and technologies overlap.  This book explores the latest trends in several key topics related to quality electronic design, with emphasis on Hardware Security, Cybersecurity, Machine Learning, and application of Artificial Intelligence (AI). The book includes topics in nonvolatile memories (NVM), Internet of Things (IoT), FPGA, and Neural Networks. 

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Weitere Infos & Material


Chapter 1. NAND Flash Memory Devices Security Enhancement Based on Physical Unclonable Functions.- Chapter 2. ReRAM based Neuromorphic Computing.- Chapter 3. Flash Technology for VLSI Design.- Chapter 4. Non-volatile memory Technologies:Characteristics,Deployment and Research Challenges.- Chapter 5. Data Analytics and Machine Learning for Coverage Closure.- Chapter 6. Cell-Aware Model Generation by Using Machine Learning.- Chapter 7. Neuromorphic Computing: A Path to Artificial Intelligence through Emulating Human Brains.- Chapter 8. AI for Cybersecurity in Distributed Automotive IoT Systems.- Chapter 9. Ultra-low Power Implementation of Neural Networks Using Inverter-based Memristive Crossbars.- Chapter 10. AI based Hardware Security Methods for Internet-of-Things Applications.- Chapter 11. Enabling Edge Computing Using Emerging Memory Technologies: From Device to Architecture.- Chapter 12. IoT Commercial, Industrial Applications and AI-powered IoT.- Chapter 13. Hardware and SystemSecurity - Attacks and Coun- termeasures Against Hardware Trojans.- Chapter 14. FPGA Security: Security Threats from Untrusted FPGA CAD Toolchain.- Chapter 15. DoS Attack Models and Mitigation Frameworks for NoC-based SoCs.- Chapter 16. Defense against security threats with regard to SoC Life Cycle.- Chapter 17. Defect Diagnosis Techniques for Silicon Customer Returns.


Dr. Ali A. Iranmanesh is the founder and CEO of Silicon Valley Polytechnic Institute. He has received MS and Ph.D. in Electrical Engineering and Physics from Stanford University, and MBA. He has been actively involved with many leading Silicon Valley companies in various engineering and senior management positions. He has been awarded with near 100 US and international patents and has many publications. Dr. Iranmanesh is the founder of the International Society for Quality Electronic Design (ISQED), a non-profit international organization devoted to innovation and advancement in electronic design, and engineering education. He is the founder of Innovotek Inc. a leading Silicon Valley consulting and design services firm. Dr. Iranmanesh is the Senior life members of, senior member of the American Society for Quality, co-founder and Chair Emeritus of the IEEE Education Society of Silicon Valley, Vice Chair Emeritus of the IEEE PV chapter, and recipient of IEEE Outstanding Educator Award.




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