Timing Optimization Through Clock Skew Scheduling

Softcover Nachdruck of hardcover 1. Auflage 2009
ISBN: 978-1-4419-4377-4
Verlag: Springer US

Buch, Englisch, 266 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 435 g

This book details timing analysis and optimization techniques for circuits with level-sensitive memory elements. It contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling. Coverage also provides a framework for and results from implementing timing optimization algorithms in a parallel computing environment.

Zielgruppe

Research

Autoren/Hrsg.

Kourtev, Ivan S.

Friedman, Eby G.

Taskin, Baris

Fachgebiete

• Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
• Technische Wissenschaften Energietechnik | Elektrotechnik Elektrotechnik
• Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Funktionale, Logische, Parallele und Visuelle Programmierung
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise

Inhaltsverzeichnis

VLSI Systems.- Signal Delay in VLSI Systems.- Timing Properties of Synchronous Systems.- Clock Skew Scheduling and Clock Tree Synthesis.- Clock Skew Scheduling of Level-Sensitive Circuits.- Clock Skew Scheduling for Improved Reliability.- Delay Insertion and Clock Skew Scheduling.- Practical Considerations.- Clock Skew Scheduling in Rotary Clocking Technology.- Experimental Results.