Embedded Memory Design for Multi-Core and Systems on Chip

Softcover Nachdruck of the Original 1. 2014 Auflage 2016
ISBN: 978-1-4939-4801-7
Verlag: Springer

Buch, Englisch, 95 Seiten, Previously published in hardcover, Format (B × H): 156 mm x 234 mm, Gewicht: 1825 g

Reihe: Analog Circuits and Signal Processing

This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.

Zielgruppe

Research

Autoren/Hrsg.

Mohammad, Baker

Fachgebiete

• Mathematik | Informatik EDV | Informatik Technische Informatik Eingebettete Systeme
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Schaltungsentwurf

Inhaltsverzeichnis

Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.