Cryogenic Interface Circuits

Design, Optimization, and Comparison
Erscheinungsjahr 2026
ISBN: 978-3-032-35293-4
Verlag: Springer

Buch, Englisch, 172 Seiten, Format (B × H): 178 mm x 254 mm

This book investigates a range of circuit design techniques to enhance the performance of superconductor-semiconductor interface circuits, essential in cryogenic computing platforms including superconducting high-performance classical computing, quantum computing, digital signal processing, single-photon detection, and neuromorphic computing. Key performance metrics, including power dissipation, output voltage swing, and biasing schemes, are optimized for interface circuits employed in 4 K Josephson-CMOS hybrid memory systems. The authors introduce multi-level output signaling techniques, which increase the data rate of high-speed digital links that transmit data from 4 K cryogenic environments to room-temperature electronics. Lightweight, hardware-efficient error-correction code encoders are also introduced for superconductor-semiconductor interface data links. The authors analyze pertinent hardware security issues, with a focus on power side-channel leakage. A correlation between the internal switching activity of interface circuits and their power dissipation is identified, revealing potential vulnerabilities in both superconducting classical and quantum computing systems. In addition to the security implications, this side-channel leakage is discussed as an alternative mechanism for design-for-testability in SFQ circuits.

Zielgruppe

Professional/practitioner

Autoren/Hrsg.

Mustafa, Yerzhan

Köse, Selçuk

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Mathematik | Informatik EDV | Informatik Technische Informatik Eingebettete Systeme
• Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur

Inhaltsverzeichnis

Introduction.- Background.- Design and Optimization of Suzuki Stack Interface Circuits.- Superconducting Output Drivers With Multi-Level Output Signaling.- Error-Correction Code Encoders for Superconductor-Semiconductor Interface Circuits.- Hardware Security of Superconductor-Semiconductor Interface Circuits.- Novel Applications of Superconducting Output Drivers.- Conclusions.

Über Autor(innen)

Yerzhan Mustafa received the B.E. degree (summa cum laude) in electrical and electronic engineering from Nazarbayev University, Nur-Sultan (Astana), Kazakhstan, in 2020, and the M.S. degree in electrical and computer engineering from the University of Rochester, Rochester, NY, USA, in 2022, where he is currently working toward the Ph.D. degree in electrical and computer engineering. He was an intern with SEEQC, Inc., Elmsford, NY, USA, in 2022. His current research interests include superconductor electronics, superconductor-semiconductor interface circuits, hybrid quantum-classical computing, and hardware security. Yerzhan is a recipient of 2024 IEEE Council on Superconductivity Graduate Study Fellowship.

Selçuk Köse received his B.S. degree from Bilkent University, Ankara, Türkiye and M.S. and Ph.D. degrees from the University of Rochester, Rochester, New York. He is currently a Professor in the Department of Electrical and Computer Engineering, University of Rochester, after spending almost 7 years in the Department of Electrical Engineering, University of South Florida (USF), Tampa, Florida. Selçuk received NSF CAREER award (2014), USF College of Engineering Outstanding Junior Research Achievement Award (2014), USF Outstanding Faculty Award (2016), Cisco Research Award (2015, 2016 & 2017) and USF Outstanding Research Achievement Award (2017). He has served as an associate editor for IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-1), Springer Nature-Computer Science, and Microelectronics Journal. 

His current research interests include hardware security with a specific focus on side-channel attacks, fault injection attacks, covert channel attacks, individual and combined countermeasures, physically unclonable functions, and true random number generators; the analysis and design of high performance/low power integrated circuits; on-chip reconfigurable DC-DC converters; interconnect related issues with a specific emphasis on the design and analysis of power and clock distribution networks; 2.5D and 3-D heterogeneous integration; emerging transistor technologies with a specific focus on graphene nanoribbon field effect transistor (GNRFET); and cryogenic electronics with a specific focus on quantum-classical interface. His research was/is supported by National Science Foundation (NSF), Semiconductor Research Corporation (SRC), Cisco Research, Florida Center for Cybersecurity (FC2) grants, Department of Energy (DoE), and Defense Advanced Research Projects Agency (DARPA).