Buch, Englisch, 150 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 265 g
Buch, Englisch, 150 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 265 g
ISBN: 978-1-4899-8788-4
Verlag: Springer
This book presents a new exploration environment for mesh-based, heterogeneous FPGA architectures. It describes state-of-the-art techniques for reducing area requirements in FPGA architectures, which also increase performance and enable reduction in power required. Coverage focuses on reduction of FPGA area by introducing heterogeneous hard-blocks (such as multipliers, adders etc) in FPGAs, and by designing application specific FPGAs. Automatic FPGA layout generation techniques are employed to decrease non-recurring engineering (NRE) costs and time-to-market of application-specific, heterogeneous FPGA architectures.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
Weitere Infos & Material
Introduction.- State of the Art.- FPGA Layout Generation.- ASIF: Application Specific Inflexible FPGA.- ASIF using Heterogeneous Logic Blocks.- ASIF Hardware Generation.- Conclusion and Future Lines of Research.
