PV | Arm Architecture: System on Chip and More | Buch | 978-1-4302-6199-5 | www.sack.de

Buch, Englisch, 300 Seiten, Book, Format (B × H): 191 mm x 235 mm

PV

Arm Architecture: System on Chip and More


1. Auflage 2014
ISBN: 978-1-4302-6199-5
Verlag: Springer

Buch, Englisch, 300 Seiten, Book, Format (B × H): 191 mm x 235 mm

ISBN: 978-1-4302-6199-5
Verlag: Springer


ARM Architecture is designed in such a way that even readers with a basic understanding of microprocessors can learn and understand the concepts with ease. This book addresses the concerns of software developers, system designers, and hardware engineers focusing on development of drivers, software, and hardware components in a closely-knit fashion to avoid compatibility issues.

ARM Architecture guides engineers through the workings of an ARM in system on chip (SOC) via an example driven systematic process. It also elucidates on data flow between peripherals and ARM in SOC, drivers and the programming of hardware peripherals through multiple illustrations. The book teaches the reader programming the ARM chip in both C and assembly language with the help of multiple examples. It helps the reader learn peripheral programming, which is necessary for firmware development for embedded systems and driver development. It also teaches the reader how to program a system on chip.

ARM Architecture does far more than just outline the ARM features; it explains the implementation of processor in real-world designs through a step-by-step process and is beneficial to people who are migrating from 8 bit micro-controllers to 32 bit micro-controllers and covers the ARM family extensively,elucidating on hardware blocks like SDRAM, RAM, etc.

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Weitere Infos & Material


1 Introduction to ARM

1.1 ARM in Embedded Systems

1.2 ARM Overview

1.2.1 ARM Registers

1.2.2 Pipelining

1.2.3 Pipeline stall

1.3 Stack

1.4 ARM and Other RISC Machines

1.5 ARM Architecture Versions

2 Basic Blocks of ARM

2.1ARM Core

2.2ITCM

2.3 DTCM

2.4 CACHE

2.5 Write Buffer

2.6 System Controller

2.7 Bus Interface Unit

2.8 Memory Protection Unit

2.9 Memory Management Unit

2.10 Co-Processor 15

3 Programmers Model

3.1 Exceptions

3.1.1 Reset

3.1.2 Undefined Instruction

3.1.3 Software Interrupt

3.1.4 Prefetch Abort

3.1.5 Data Abort

3.1.6 IRQ Interrupt

3.1.6.1 Interrupt Latency

3.1.7 FIQ

3.2 Modes

4 C Programming For ARM

4.1 Parameter Passing for Functions

4.2 Optimization Techniques

4.3 Instruction Scheduling

4.4 Structures and BitFields

4.5 Short, Int and Char

4.6 Use of Pragmas

5 Assembly Language

5.1 Types of Instruction

5.1.1 Co-Processor Instructions

5.1.2 Status Register Instructions

5.1.3 Load/Store Instructions

5.1.4 Load and store using stack operations

5.1.5 Data Processing Instructions

5.1.6 Exception Generation Instructions

5.1.7 Branch Instructions

5.2 Thumb Instructions

5.3 Examples

6 Programming Chip

6.1 Startup code

6.2 Programming peripherals

7 ARM System on Chip

7.1 AMBA Overview

7.1.1 Types of AMBA protocol

7.1.2 Components of AMBA

7.2 System On Chip Design

7.2.1 Single master

7.2.2 Multimaster

7.2.3 Memory map

7.2.4 Default Slave

7.2.5 FIQ ,IRQ and External Interrupts

8 ARM core Basics



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