Nanoscale Semiconductor Devices

Materials, Modeling, and Circuit Integration
Erscheinungsjahr 2026
ISBN: 978-3-032-37850-7
Verlag: Springer

Buch, Englisch, 382 Seiten, Format (B × H): 155 mm x 235 mm

Reihe: Lecture Notes in Nanoscale Science and Technology

This book offers a comprehensive exploration of the design and technology of nanoscale semiconductor devices, with a special focus on novel materials and structures that address the limitations of conventional silicon-based technologies. As the miniaturization of devices pushes beyond traditional scaling limits, alternative materials—such as 2D materials, Germanium, III-V compounds, carbon, and graphene—are critical to overcoming challenges like short channel effects, high leakage currents, and power dissipation. 

Targeted towards researchers, scientists, and postgraduate students, this book covers cutting-edge device architectures such as FinFETs, GAA-FETs, nanowires, CNTFETs, TFETs, FeFETs, HEMTs, and spin-based devices. It also details the modeling, simulation, and application-driven design for low-power, high-performance VLSI systems. 

With clear explanations and in-depth analysis, this volume bridges the gap between traditional MOSFET fabrication and next-generation nanoelectronic design. Readers will gain a solid understanding of material properties, device behavior, and circuit co-design strategies, making it an essential resource for advancing chip design in the sub-micron era.

Zielgruppe

Research

Autoren/Hrsg.

Raj, Balwinder

Jabir, Abusaleh

Khandelwal, Saurabh

Singh, Mandeep

Fachgebiete

• Naturwissenschaften Physik Thermodynamik Festkörperphysik, Kondensierte Materie
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Elektronische Baugruppen, Elektronische Materialien
• Technische Wissenschaften Maschinenbau | Werkstoffkunde Technische Mechanik | Werkstoffkunde Materialwissenschaft: Elektronik, Optik
• Technische Wissenschaften Technik Allgemein Nanotechnologie

Inhaltsverzeichnis

Novel Devices with Carbon and Graphene Architectures Materials and Applications.- MLGNR Interconnects for Deep Submicron VLSI A Performance Perspective.- Recent Deposition Technologies and Emerging Thin Film Materials for Next Generation Nanoscale Microelectronics.- Functions and Properties of Nanoscale Semiconductors.- A Scoping Review on TFET Based mmWave Circuits and Antenna Integration for 6G Opportunities and Challenges.- Low Power SRAM Design Techniques for Energy Efficient Memory System.- Memristive Chemical Sensors Physics Modelling and Direct Digitisation.- Transformative Advances in Electromagnetic Absorber Modeling A Chronological and Technological Insight.- Device Level Optimization of InSe FETs Role of Asymmetric Underlap and High k Dielectrics in Analog RF Applications.- Recent Advances in Spintronics based Neurons for Neuromorphic Computing Device Principles and Applications.- 2D Materials for Nanoscale Semiconductor Devices.

Über Autor(innen)

Dr. Balwinder Raj is an Associate Professor at the National Institute of Technology Jalandhar, India, with more than 15 years of teaching, research, and administrative experience. He received his B.Tech. in Electronics Engineering from Punjab Technical University, his M.Tech. in Microelectronics from Panjab University, and his Ph.D. in VLSI Design from the Indian Institute of Technology Roorkee in 2004, 2006, and 2010, respectively. He subsequently conducted postdoctoral research at the University of Rome Tor Vergata, Italy, through an Erasmus Mundus fellowship from the European Commission. He has also held visiting research positions at KTH Royal Institute of Technology, Sweden, through an India4EU fellowship, and at Aalto University, Finland. Dr. Raj has authored/co-authored eight books, 15 book chapters, and more than 150 peer-reviewed journal and conference papers. He has supervised 15 doctoral and more than 55 master’s students and has completed six research projects funded by DST, SERB, ISRO, and CIMO Finland. His research interests include classical and nonclassical nanoscale semiconductor-device modeling, nanoelectronics for hardware security and sensing, FinFET-based memory, low-power digital and analog VLSI design, circuit design, and FPGA implementation. 

Prof. Abusaleh Jabir received his M.Sc. (Hons.) in Computer Science from the University of Dhaka, Bangladesh, and his D.Phil. in Computing from the University of Oxford, UK, in 2001. At Oxford, he worked with the Hardware Compilation Group within the Programming Research Group. He previously served as a Lecturer at the University of Dhaka and as a senior research staff member at Celoxica Ltd., Oxford. He is currently a University Reader in the Department of Computing and Communication Technologies at Oxford Brookes University, where he founded and leads the Advanced Reliable Computer Systems Group. Prof. Jabir is the inventor or co-inventor of several patents that are being commercialized. His research interests include electronic design automation, computer architecture, reliable and fault-tolerant digital systems, emerging technologies, hardware testing and verification, and hardware for secure and reliable cryptosystems. With J. Saul, he received the IET/IEE Hartree Premium Award for their paper on minimizing three-level mixed Boolean-function representations. interests include semiconductor-device modeling, memory design, carbon-nanotube and nanowire technologies, FeFETs, ferroelectric memories, and low-power VLSI design.

Dr. Saurabh Khandelwal received his M.Tech. in VLSI Design in 2012 and his Ph.D. in 2016. He is currently a Postdoctoral Fellow at Oxford Brookes University, UK. He has authored or co-authored more than 70 papers in peer-reviewed journals and conference proceedings, edited an international book, and holds two UK patents. He has presented his research internationally, including in Turkey and Greece, and participated in advanced training organized by the International Telecommunication Union and the Government of Thailand. Dr. Khandelwal received the Young Scientist Award from the Madhya Pradesh Council of Science and Technology in 2014 and was shortlisted for the MIT Technology Review India TR35 Young Innovator Award in 2016. He serves as a reviewer for several journals indexed in the Science Citation Index and Scopus and is a life member of the Indian Science Congress Association, the International Association of Engineers, and the International Association of Advanced Materials. His research interests include digital VLSI circuit design, electronic design automation, computer architecture, and reliable and fault-tolerant digital systems, particularly those based on emerging technologies. 

Dr. Mandeep Singh is an Assistant Professor at the National Institute of Technology Hamirpur, India. He received his B.Tech. in Electronics and Communication Engineering and M.Tech. in VLSI Design from Punjabi University, Patiala, and his Ph.D. from the National Institute of Technology Jalandhar. He subsequently worked as a Postdoctoral Fellow at the Indian Institute of Technology Kanpur. Dr. Singh has five years of experience teaching undergraduate and postgraduate students at institutions including NIT Uttarakhand, the Indian Institute of Information Technology Surat, and Punjab Technical University. He has published three books, ten book chapters, and numerous research papers on VLSI design and circuits. He has also participated in international workshops and conferences in countries including the United States and Germany. His research interests include semiconductor-device modeling, memory design, carbon-nanotube and nanowire technologies, FeFETs, ferroelectric memories, and low-power VLSI design.