Dynamic Reconfigurable Network-on-Chip Design

Innovations for Computational Processing and Communication
Erscheinungsjahr 2011
ISBN: 978-1-61520-807-4
Verlag: Information Science Reference

Buch, Englisch, 386 Seiten, Hardback, Format (B × H): 221 mm x 286 mm, Gewicht: 1228 g

Dynamic Reconfigurable Network-on-Chip Design: Innovations for Computational Processing and Communication is the one of the first compilations written to demonstrate this future for network -on-chip design. Through dynamic and creative research into questions ranging from integrating reconfigurable computing techniques, to task assigning, scheduling and arrival, to designing an operating system to take advantage of the computing and communication flexibilities brought about by run-time reconfiguration and network-on-chip, this book represents a complete source of the techniques and applications for reconfigurable network-on-chip necessary for understanding of future of this field.

Autoren/Hrsg.

Shen, Jih-Sheng

Hsiung, Pao-Ann