Foundations of Hardware IP Protection

1. Auflage 2017
ISBN: 978-3-319-50378-3
Verlag: Springer International Publishing

Buch, Englisch, 240 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 541 g

This book provides a comprehensive and up-to-date guide to the design of security-hardened, hardware intellectual property (IP). Readers will learn how IP can be threatened, as well as protected, by using means such as hardware obfuscation/camouflaging, watermarking, fingerprinting (PUF), functional locking, remote activation, hidden transmission of data, hardware Trojan detection, protection against hardware Trojan, use of secure element, ultra-lightweight cryptography, and digital rights management. This book serves as a single-source reference to design space exploration of hardware security and IP protection.

Zielgruppe

Professional/practitioner

Autoren/Hrsg.

Torres, Lionel

Bossuet, Lilian

Fachgebiete

• Mathematik | Informatik EDV | Informatik Technische Informatik Computersicherheit
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik

Inhaltsverzeichnis

Digital Right Management for IP Protection.- Turning Electronic Circuits Features into On-Chip Locks.- Logic Modification-Based IP Protection Methods: An Overview and a Proposal.- IP FSM Watermarking.- Side Channel Analysis, an Efficient Ally for IP Protection.- Hardware Obfuscation.- An application of Partial Hardware Reverse Engineering for the Detection of Hardware Trojan.- Linear Complementary Codes: Novel Hardware Trojan Prevention and Detection Approach.- Ultra-Lightweight Implementation in Area of Block Ciphers.- Enhancing Secure Elements – Technology and Architecture.

Über Autor(innen)

Lilian Bossuet is an Associate Professor at University of Saint-Etienne, head of the Embedded System Security group and head of the Computer Science departement of the Laboratoire Hubert Curien.  His research is in the general area of embedded systems design, including hardware security of embedded systems (data, intellectual property and system security) and reconfigurable hardware design.  His active research topics focus on Hardware security, war against illegal IC copy and counterfeiting, IP protection, PUF design and characterization, side channel attacks and countermeasures, TRNG attack, MCryptoPSoC architecture and design, crypto-processor architecture and design, embedded system security, and FPGA security.

Lionel Torres is Professor at the University of Montpellier (Polytech Montpellier engineering school), France. His research activities is part of the microelectronic department of the Laboratory of Informatics, Robotics and Microelectronics of Montpellier (laboratory to the University of Montpellier and the French National Center for Scientic Research (CNRS)). His research interests concern system level architecture, with a specific focus in the security and cryptographic applications and Non-Volatile Computing based on MRAM. He has a PhD from the University of Montpellier in microelectronic design and was at the head of the microelectronic department of LIRMM and he is now deputy head of Polyptych Montpellier and at the Head of the Labex (Laboratory of Excellence) of Digital and Hardware Solutions, Environmental and Organic Life Modeling. He is also co-founder of the Algodone company, company proposing a Digital Right Management solution for silicon IP.