Leakage in Nanometer CMOS Technologies

Softcover Nachdruck of hardcover 1. Auflage 2006
ISBN: 978-1-4419-3826-8
Verlag: Springer US

Buch, Englisch, 308 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 487 g

Reihe: Integrated Circuits and Systems

Readers acquire understanding of why leakage power components are becoming increasingly relevant in CMOS systems that use nanometer scale MOS devices. Leakage current sources at the MOS device level including sub-threshold and different types of tunneling are discussed in detail. The book will cover in detail promising solutions at the device, circuit, and architecture levels of abstraction. Since manifestation of these MOS device leakage components at the full chip level depends considerably on several aspects including the nature of the circuit block, its state, its application workload, and Process/Voltage/Temperature conditions, the sensitivity of the various MOS leakage sources to these conditions are explained from the first principles. Also treated are the resulting effects so the reader understands the effectiveness of leakage power reduction solutions under these different conditions.  With case studies supplying real-world examples that reap the benefits of leakage power reduction solutions, the book highlights different device design choices that exist to mitigate increases in the leakage components as technology scales.

Zielgruppe

Research

Autoren/Hrsg.

Chandrakasan, Anantha P.

Narendra, Siva G.

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
• Mathematik | Informatik EDV | Informatik Technische Informatik Hardware: Grundlagen und Allgemeines

Inhaltsverzeichnis

Taxonomy of Leakage: Sources, Impact, and Solutions.- Leakage Dependence on Input Vector.- Power Gating and Dynamic Voltage Scaling.- Methodologies for Power Gating.- Body Biasing.- Process Variation and Adaptive Design.- Memory Leakage Reduction.- Active Leakage Reduction and Multi-Performance Devices.- Impact of Leakage Power and Variation on Testing.- Case Study: Leakage Reduction in Hitachi/Renesas Microprocessors.- Case Study: Leakage Reduction in the Intel Xscale Microprocessor.- Transistor Design to Reduce Leakage.