Design Automation Techniques for Approximation Circuits

Verification, Synthesis and Test
Softcover Nachdruck of the original 1. Auflage 2019
ISBN: 978-3-030-07550-7
Verlag: Springer International Publishing

Buch, Englisch, 130 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 242 g

This book describes reliable and efficient design automation techniques for the design and implementation of an approximate computing system. The authors address the important facets of approximate computing hardware design - from formal verification and error guarantees to synthesis and test of approximation systems. They provide algorithms and methodologies based on classical formal verification, synthesis and test techniques for an approximate computing IC design flow.  This is one of the first books in Approximate Computing that addresses the design automation aspects, aiming for not only sketching the possibility, but providing a comprehensive overview of different tasks and especially how they can be implemented.

Zielgruppe

Research

Autoren/Hrsg.

Chandrasekharan, Arun

Drechsler, Rolf

Große, Daniel

Fachgebiete

• Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Schaltungsentwurf

Inhaltsverzeichnis

Introduction.- Preliminaries.- Error Metric Computation for Approximate Combinational Circuits.- Formal Verification of Approximate Sequential Circuits.- Synthesis Techniques for Approximation Circuits.- Post-Production Test Strategies for Approximation Circuits.- ProACt: Hardware Architecture for Cross-Layer Approximate Computing.- Conclusions and Outlook.- Index.- References.

Über Autor(innen)

Arun Chandrasekharan is a Software Engineer at OneSpin Solutions GmbH, in Munich, Germany.He received the Dr.-Ing. degree in computer science from the University of Bremen in 2017.  His research interests are EDA algorithms and methodologies for formal verification and logic synthesis. Arun Chandrasekharan is a recipient of Richard Newton Young Student Fellowship in 2016 and German Academic Exchange Service (DAAD) scholarship for the period of 2014-2017. He is an alumni of Indian Institute of Technology, Bombay.

Daniel Große is a Senior Researcher at University of Bremen and at the German Research Center for Artificial Intelligence (DFKI) since 2015. He received the Dr.-Ing. degree in computer science from the University of Bremen in 2008. He remained as a Post-Doctoral Researcher with the Group of Computer Architecture, University of Bremen. In 2010, he was a substitute Professor for computer architecture with Albert-Ludwigs University, Freiburg, Germany. From 2013 to 2014, he was the CEO of the EDA start-up solvertec focusing on automated debugging techniques. Since 2015, he has been a Senior Researcher with the University of Bremen and DFKI, and also the Scientific Coordinator of the Graduate School of System Design, funded within the German Excellence Initiative. His current research interests include verification, virtual prototyping, debugging, and synthesis. He published over 100 papers in peer-reviewed journals and conferences in the above areas. Dr. Große served in program committees of numerous conferences, including DAC, ICCAD, DATE, CODES+ISSS, FDL, and MEMOCODE. 

Prof. Rolf Drechsler is the Director of Cyber-Physical Systems department at the German Research Center for Artificial Intelligence (DFKI) since 2011. He is also a Full Professor at the Institute of Computer Science, University of Bremen, since 2001 and the head of Group of Computer Architecture (AGRA), Uni-Bremen. Before, he worked for the Corporate Technology Department of Siemens AG, and was with the Institute of Computer Science, Albert-Ludwig University of Freiburg/Breisgau, Germany. Rolf Drechsler received the Diploma and Dr. Phil. Nat. degrees in computer science from the Goethe-University in Frankfurt/Main, Germany, in 1992 and 1995, respectively. He has authored more than 200 scientific publications and 10 text books in the field of EDA for logic synthesis and formal verification.  He is also named a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) for the outstanding contributions to the EDA community.