E-Book, Englisch, Band Volume 14, 212 Seiten, Web PDF
Einspruch VLSI Design
1. Auflage 2014
ISBN: 978-1-4832-1780-2
Verlag: Elsevier Science & Techn.
Format: PDF
Kopierschutz: 1 - PDF Watermark
E-Book, Englisch, Band Volume 14, 212 Seiten, Web PDF
Reihe: VLSI Electronics Microstructure Science
ISBN: 978-1-4832-1780-2
Verlag: Elsevier Science & Techn.
Format: PDF
Kopierschutz: 1 - PDF Watermark
VLSI Electronics Microstructure Science, Volume 14: VLSI Design presents a comprehensive exposition and assessment of the developments and trends in VLSI (Very Large Scale Integration) electronics. This volume covers topics that range from microscopic aspects of materials behavior and device performance to the comprehension of VLSI in systems applications. Each article is prepared by a recognized authority. The subjects discussed in this book include VLSI processor design methodology; the RISC (Reduced Instruction Set Computer); the VLSI testing program; silicon compilers for VLSI; and specialized silicon compiler and programmable chip for language recognition. Scientists, engineers, researchers, device designers, and systems architects will find the book very useful.
Autoren/Hrsg.
Weitere Infos & Material
1;Front Cover;1
2;VLSI Design;4
3;Copyright Page;5
4;Table of Contents;6
5;List of Contributors;8
6;Preface;10
7;Chapter 1. VLSI Processor Design Methodology;12
7.1;I. INTRODUCTION;13
7.2;II. ARCHITECTURAL METHODOLOGY;16
7.3;III. ORGANIZATIONAL METHODOLOGY;21
7.4;IV. PHYSICAL DESIGN METHODOLOGY;28
7.5;V. ELECTRICAL DESIGN ISSUES;39
7.6;VI. CONCLUSIONS;44
7.7;ACKNOWLEDGMENTS;44
7.8;REFERENCES;44
8;Chapter 2. RISC: Effective Architectures
for VLSI Computers;46
8.1;I. INTRODUCTION;47
8.2;II. GENERAL-PURPOSE VON NEUMANN COMPUTATIONS;49
8.3;III. FAST ACCESS TO OPERANDS;56
8.4;IV. REGISTER-ORIENTED INSTRUCTION SET;66
8.5;V. THE MICROARCHITECTURE OF RISC II;73
8.6;VI. IMPLEMENTATION OF VLSI RISCS;80
8.7;VII. EVALUATION OF THE RISC ARCHITECTURE;83
8.8;VIII. CONCLUSIONS;88
8.9;REFERENCES;88
9;Chapter 3. VLSI Design for Testability;92
9.1;I. THE VLSI TESTING PROGRAM —AN OVERVIEW;92
9.2;II. DESIGN-FOR-TESTABILITY TECHNIQUES;101
9.3;III. SELF-TESTING TECHNIQUES;115
9.4;IV. CONCLUSION;121
9.5;ACKNOWLEDGMENTS;122
9.6;REFERENCES;122
10;Chapter 4. Silicon Compilers For VLSI;126
10.1;I. INTRODUCTION;126
10.2;II. WHAT IS A SILICON COMPILER?;128
10.3;III. THE OPERATION OF A SILICON COMPILER;129
10.4;IV. COMPONENTS OF A SILICON COMPILER;130
10.5;V. AREAS FOR FURTHER DEVELOPMENT;139
10.6;VI. SILICON COMPILATION LITERATURE;145
10.7;VII. CONCLUSIONS;146
10.8;ACKNOWLEDGMENTS;146
10.9;REFERENCES;147
11;Chapter 5. A Specialized Silicon Compiler and Programmable Chip
for Language Recognition;150
11.1;I. INTRODUCTION;150
11.2;II. A SPECIALIZED CIRCUIT COMPILER FOR LANGUAGE
RECOGNIZERS;156
11.3;III. LAYOUT OF SYSTOLIC RECOGNIZERS;177
11.4;IV. CONCLUSIONS AND DIRECTIONS;202
11.5;REFERENCES;204
12;Index;208
