Keller / Resch / Himmler Tools for High Performance Computing

Proceedings of the 2nd International Workshop on Parallel Tools for High Performance Computing, July 2008, HLRS, Stuttgart
1. Auflage 2008
ISBN: 978-3-540-68564-7
Verlag: Springer Berlin Heidelberg
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 202 Seiten

Developing software for current and especially for future architectures will require knowledge about parallel programming techniques of applications and library p- grammers. Multi-core processors are already available today, and processors with a dozen and more cores are on the horizon. The major driving force in hardware development, the game industry, has - ready shown interest in using parallel programming paradigms, such as OpenMP for further developments. Therefore developers have to be supported in the even more complex task of programming for these new architectures. HLRS has a long-lasting tradition of providing its user community with the most up-to-date software tools. Additionally, important research and development projects are worked on at the center: among the software packages developed are the MPI correctness checker Marmot, the OpenMP validation suite and the M- implementations PACX-MPI and Open MPI. All of these software packages are - ing extended in the context of German and European community research projects, such as ParMA, the InterActive European Grid (I2G) project and the German C- laborative Research Center (Sonderforschungsbereich 716). Furthermore, ind- trial collaborations, i.e. with Intel and Microsoft allow HLRS to get its software production-grade ready. In April 2007, a European project on Parallel Programming for Multi-core - chitectures, in short ParMA was launched, with a major focus on providing and developing tools for parallel programming.

Autoren/Hrsg.

Resch, Michael

Keller, Rainer

Himmler, Valentin

Bett,

Krammer, Bettina

Schulz, Alexander

Inhaltsverzeichnis

1;Preface;5
2;Contents;7
3;List of Contributors;11
4; I Integrated Development Environments;12
4.1;Sun HPC ClusterTools™ 7+: A Binary Distribution of Open MPI;13
4.1.1;Introduction;13
4.1.2;History;14
4.1.3;Sun-Driven features;15
4.1.4;Sun Product Activity;23
4.1.5;Pros and Cons;25
4.1.6;Future work and conclusions;26
4.1.7;References;27
4.2;An Integrated Environment For the Development of Parallel Applications;29
4.2.1;Introduction;29
4.2.2;Challenges;31
4.2.3;Architecture;33
4.2.4;A Simple Case Study;38
4.2.5;Future Directions;41
4.2.6;Conclusion;43
4.2.7;References;44
4.3;Debugging MPI Programs on the Grid using g-Eclipse;45
4.3.1;Introduction;45
4.3.2;Related Work;46
4.3.3;Overview of g-Eclipse Approach;47
4.3.4;Remote Builder;48
4.3.5;Grid Application Launchers;49
4.3.6;Trace Viewer;49
4.3.7;Conclusions and Future Work;54
4.3.8;References;54
5; II Parallel Communication and Debugging;56
5.1;Enhanced Memory debugging of MPI-parallel Applications in Open MPI;57
5.1.1;Introduction;57
5.1.2;Overview of Memcheck;58
5.1.3;Design and Implementation;59
5.1.4;Performance Implications;61
5.1.5;Detectable error classes and findings in actual applications;65
5.1.6;Conclusion and future work;67
5.1.7;References;68
5.2;MPI Correctness Checking with Marmot;69
5.2.1;Introduction;70
5.2.2;Related Work;70
5.2.3;Design of Marmot;71
5.2.4;Collaboration with other tools;78
5.2.5;Experiences with real Applications;80
5.2.6;How to install and use Marmot;83
5.2.7;Conclusion and Future Work;84
5.2.8;References;84
5.3;Memory Debugging in Parallel and Distributed Applications;87
5.3.1;Introduction;87
5.3.2;The Challenges of Memory Debugging in Parallel Development;88
5.3.3;Classifying Memory Errors;88
5.3.4;Detecting Memory Leaks;90
5.3.5;The MemoryScape Debugger;90
5.3.6;MemoryScape Architecture;91
5.3.7;MemoryScape Features;92
5.3.8;MemoryScape Usage Tips;95
5.3.9;MemoryScape User Case Study: SIMULIA Uses MemoryScape to Find and Fix Bugs Quickly;96
5.3.10;Future MemoryScape Product Plans;98
5.3.11;Conclusion;98
6; III Performance Analysis Tools;99
6.1;Sequential Performance Analysis with Callgrind and KCachegrind;100
6.1.1;Introduction;100
6.1.2;Callgrind: a Call-Graph building Online Cache Simulator;104
6.1.3;KCachegrind: Profile Visualization;112
6.1.4;Usage Example;117
6.1.5;Future Development;118
6.1.6;References;120
6.2;Improving Cache Utilization Using Acumem VPE;121
6.2.1;Introduction;122
6.2.2;Throughput Study of SPEC CPU 2006;124
6.2.3;First Generation Performance Tools Based on Hardware Counters;126
6.2.4;Enter: The New Performance Tool;128
6.2.5;Utilization Study of the Worst SPEC CPU 2006 Applications;132
6.2.6;Tuning Example: 179.art;134
6.2.7;Tuning Example: Revisiting the Throughput Applications;138
6.2.8;Conclusion;140
6.2.9;References;141
6.3;Parallel Performance Analysis Tools;141
6.3.1;The Vampir Performance Analysis Tool-Set;143
6.3.1.1;Introduction;143
6.3.1.2;Performance Analysis via Profiling or Tracing;144
6.3.1.3;Instrumentation with VampirTrace;145
6.3.1.4;Run-Time Measurement and Event Recording;148
6.3.1.5;Trace Visualization with Vampir and VampirServer;152
6.3.1.6;Related Work;158
6.3.1.7;Conclusions and Future Work;158
6.3.1.8;References;159
6.3.2;Usage of the SCALASCA toolset for scalable performance analysis of large-scale parallel applications;160
6.3.2.1;Introduction;160
6.3.2.2;Overview;161
6.3.2.3;Instrumentation and Measurement;162
6.3.2.4;Trace Analysis;165
6.3.2.5;Understanding Performance Behavior;167
6.3.2.6;Outlook;169
6.3.2.7;References;170
6.3.3;Evolution of a Parallel Performance System;171
6.3.3.1;Introduction;171
6.3.3.2;TAU Performance System Design and Architecture;172
6.3.3.3;TAU Instrumentation;174
6.3.3.4;TAU Measurement ;180
6.3.3.5;TAU Analysis;185
6.3.3.6;Conclusion and Future Work;188
6.3.3.7;References;190
6.3.4;Cray Performance Analysis Tools;193
6.3.4.1;Introduction;193
6.3.4.2;The Cray Performance Analysis Tools;194
6.3.4.3;Conclusions and Future Work;200
6.3.4.4;References;201
6.3.5;Index;202