Kunz / Stoffel Reasoning in Boolean Networks

Logic Synthesis and Verification Using Testing Techniques
Erscheinungsjahr 2013
ISBN: 978-1-4757-2572-8
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, Band 9, 230 Seiten, eBook

Reihe: Frontiers in Electronic Testing

provides a detailed treatment of recent research advances in algorithmic techniques for logic synthesis, test generation and formal verification of digital circuits. The book presents the central idea of approaching design automation problems for logic-level circuits by specific Boolean reasoning techniques.
While Boolean reasoning techniques have been a central element of two-level circuit theory for many decades describes a basic reasoning methodology for multi-level circuits. This leads to a unified view on two-level and multi-level logic synthesis. The presented reasoning techniques are applied to various CAD-problems to demonstrate their usefulness for today's industrially relevant problems.
provides lucid descriptions of basic algorithmic concepts in automatic test pattern generation, logic synthesis and verification and elaborates their intimate relationship to provide further intuition and insight into the subject. Numerous examples are provide for ease in understanding the material.
is intended for researchers in logic synthesis, VLSI testing and formal verification as well as for integrated circuit designers who want to enhance their understanding of basic CAD methodologies.

Zielgruppe

Research

Autoren/Hrsg.

Kunz, Wolfgang

Stoffel, Dominik

Inhaltsverzeichnis

1 Preliminaries.- 2 Combinational Atpg.- 3 Recursive Learning.- 4 AND/OR Reasoning Graphs.- 5 Logic Optimization.- 6 Logic Verification.- 7 Conclusions and Future Work.- References.