Mishra / Singh / Vijayakrishnan System on Chip Interfaces for Low Power Design

1. Auflage 2015
ISBN: 978-0-12-801790-6
Verlag: Academic Press
Format: EPUB
Kopierschutz: 6 - ePub Watermark

E-Book, Englisch, 406 Seiten, Format (B × H): 191 mm x 235 mm

System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The book offers a common context to help understand the variety of available interfaces and make sense of technology from different vendors aligned with multiple standards. With particular emphasis on power as a factor, the authors explain how each interface performs in various usage scenarios and discuss their advantages and disadvantages. Readers learn to make educated decisions on what interfaces to use when designing systems and gain insight for innovating new/custom interfaces for a subsystem and their potential impact.

- Provides a top-down guide to SoC interfaces for memory, multimedia, sensors, display, and communication
- Explores the underlying protocols and architecture of each interface with multiple examples
- Guides through competing standards and explains how different interfaces might interact or interfere with each other
- Explains challenges in system design, validation, debugging and their impact on development

Autoren/Hrsg.

Mishra, Sanjeeb

Singh, Neeraj Kumar

Vijayakrishnan, Rousseau

Fachgebiete

• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Schaltungsentwurf
• Mathematik | Informatik EDV | Informatik Technische Informatik Eingebettete Systeme

Inhaltsverzeichnis

- SoC Design Fundamentals and Evolution
- Understanding Power Consumption Fundamentals
- Generic SoC Architecture and Components
- Display Interfaces
- Multimedia Interfaces
- Communication Interfaces
- Memory Interfaces
- Security Interfaces
- Power Interfaces
- Sensor Interfaces
- Input Device Interfaces
- Debug Interfaces

Appendix A: Overview of Intel SoC: Baytrail Appendix B: Industry Consortiums Appendix C: USB3.0

Über Autor(innen)

Vijayakrishnan, Rousseau
Vijayakrishnan Rousseau is a Technical Lead at Intel. He has 15 years of experience in GPU and SOC validation with specialization in Display interfaces like HDMI, Display Port and Emulation.

Mishra, Sanjeeb
Sanjeeb Mishra is a Validation Architect with Intel. He has 15 years of experience ranging from hardware system design to SOC validation for telecom, consumer electronics, PC and mobility products; and has specific expertise on SoC architecture for mobile devices.

Singh, Neeraj Kumar
Neeraj Kumar Singh is a Platform Architect for tablet platforms at Intel. Prior to this he worked on CPU, Graphics and Chipset validation tools. His areas of expertise are hardware software co-design, SoC system architecture, and system software design and development.