E-Book, Englisch, Band 11, 160 Seiten, eBook
Nicolaidis / Zorian / Pradhan On-Line Testing for VLSI
1998
ISBN: 978-1-4757-6069-9
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark
E-Book, Englisch, Band 11, 160 Seiten, eBook
Reihe: Frontiers in Electronic Testing
ISBN: 978-1-4757-6069-9
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark
contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent . Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties.
is an edited volume of original research comprising invited contributions by leading researchers.
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
Foreword; V. Agrawal. 1: Introduction. 1.1. On-Testing for VLSI-A Compendium of Approaches; M. Nicolaidis, Y. Zorian. 2: Self-Checking Design. 2.1. On-Line Fault Monitoring; J.J. Stiffler. 2.2. Efficient Totally Self-Checking Shifter Design; R.O. Duarte, et al. 2.3. A New Design Method for Self-Checking Unidirectional Combinational Circuits; V.S. Saposhnikov, et al. 2.4. Concurrent Delay Detection in Duplication Systems; A. Paschalis, et al. 3: Self-Checking Checkers. 3.1. Design of Self-Testing Checkers for m-out-of-n Codes Using Parallel Counters; S.J. Piestrak. 3.2. Self-Testing Embedded Two-Rail Checkers; D. Nikolos. 4: On-Line Monitoring of Reliability Indicators. 4.1. Thermal Monitoring of Self-Checking Systems; V. Székeley, et al. 4.2. Integrated Temperature Sensors for On-Line Thermal Monitoring of Microelectronics Structures; K. Arabi, B. Kaminska. 4.3. Clocked Dosimeter Compatible Digital CMOS; E.G. Moreno, et al. 5: Built-In Self-Test. 5.1. Design of Scalable Hardware Test Generators for On-Line BIST; H. Al-Asaad, et al. 5.2. Mixed Mode BIST Using Embedded Processors; S. Hellebrand, et al. 5.3. A BIST Scheme for Non-Volatile Memories; P. Olivo, M. Dalpasso. 6: Fault Tolerant Systems. 6.1. On-Line Fault Resilience through Gracefully Degradable ASICs; A. Orailoglu. 6.2. Delivering Dependable Telecommunication Services Using Off-the-Shelf System Components; Y. Levendel.




