Parr Logic Designer's Handbook

Circuits and Systems
2. Auflage 2013
ISBN: 978-1-4832-9280-9
Verlag: Elsevier Science & Techn.
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 488 Seiten, Web PDF

Easy-to-read, but nonetheless thorough, this book on digital circuits is for use by students and engineers, and is a readily accessible source of data on devices in the TTL and CMOS families. The book is written to be used as a Designer's Handbook and will spend its days on the designer's bench rather than their bookshelf. The basic theory is explained and then supported with specific practical examples. * Revised, enlarged, reduced price edition * Easy-to-read, jargon free book suitable for professionals and students * Plenty of basic theory and practical information * Based on authors practical experience of logic design * Combined textbook/reference book

Autoren/Hrsg.

Parr, E. A.

Inhaltsverzeichnis

1;Front Cover;1
2;Logic Designer's Handbook: Circuits and Systems;4
3;Copyright Page;5
4;Table of Contents;6
5;Dedication;3
6;Preface to the Second Edition;14
7;Preface to the First Edition;16
8;Chapter 1. Fundamental Theory;18
8.1;1.1 Analog and digital circuits;18
8.2;1.2 Relay and switching circuits;20
8.3;1.3 Logic gates;23
8.4;1.4 Mathematical principles;27
8.5;1.5 Specifications;36
8.6;1.6 Integrated circuits;42
9;Chapter 2. Logic Families;44
9.1;2.1 Introduction;44
9.2;2.2 Resistor Transistor Logic (RTL);44
9.3;2.3 Diode Transistor Logic (DTL);45
9.4;2.4 Complementary Transistor Logic (CTL);47
9.5;2.5 Direct Coupled Transistor Logic (DCTL) and Integrated Injection Logic (I2L);47
9.6;2.6 Emitter Coupled Logic (ECL) and Common Mode Logic (CML);49
9.7;2.7 Transistor Transistor Logic (TTL) 35;52
9.8;2.8 Complementary Metal Oxide Semiconductor (CMOS) logic ;57
9.9;2.9 Industrial logic families;62
9.10;2.10 Choosing a lgic family;63
10;Chapter 3. Combinational Logic;67
10.1;3.1 Introduction;67
10.2;3.2 Logic gates;69
10.3;3.3 Combinational design and minimization;85
10.4;3.4 Hazards, races and glitches;103
10.5;3.5 Data selectors and decoders;107
10.6;3.6 Formal minimization, the Quine-McCluskey method;112
10.7;3.7 ROM and PROM logic;114
10.8;3.8 UCLAs, PALs, and PLAs;116
10.9;3.9 Gates and other combinational logic ICs;120
11;Chapter 4. Storage;125
11.1;4.1 Introduction;125
11.2;4.2 Cross-coupled flip-flops;125
11.3;4.3 Edge triggering;129
11.4;4.4 Transparent latch;132
11.5;4.5 Clocked storage;134
11.6;4.6 Non-volatile storage;141
11.7;4.7 Practical considerations;142
11.8;4.8 Storage devices;143
12;Chapter 5. Timers, Monostables and Oscillators;145
12.1;5.1 Introduction;145
12.2;5.2 Delays on and off;145
12.3;5.3 Monostables (one-shots);147
12.4;5.4 Specific monostables;152
12.5;5.5 Long period timers;155
12.6;5.6 Strobes;161
12.7;5.7 Oscillators and clocks;163
12.8;5.8 Miscellaneous devices;169
12.9;5.9 monostables/Timers and oscillator ICs;173
13;Chapter 6. Binary Arithmetic;175
13.1;6.1 Introduction;175
13.2;6.2 Number systems, bases and binary;175
13.3;6.3 Octal and hexadecimal representation;179
13.4;6.4 Addition of binary numbers;182
13.5;6.5 Negative numbers;184
13.6;6.6 Subtraction;186
13.7;6.7 Multiplication and division;189
13.8;6.8 Binary fractions;191
13.9;6.9 Other codings;192
14;Chapter 7. Counters and Shift Registers;198
14.1;7.1 Introduction;198
14.2;7.2 The toggle flip-flop;198
14.3;7.3 Ripple counters;199
14.4;7.4 Synchronous counters;209
14.5;7.5 Hybrid counters;223
14.6;7.6 Shift registers;224
14.7;7.7 Counter and shift register devices;231
15;Chapter 8. Arithmetic Circuits;235
15.1;8.1 Introduction;235
15.2;8.2 Encoders and decoders;235
15.3;8.3 Binary addition;239
15.4;8.4 Serial/parallel arithmetic;241
15.5;8.5 High speed adders and look ahead carries;242
15.6;8.6 MSI adders;244
15.7;8.7 Subtraction circuits;245
15.8;8.8 Comparators;248
15.9;8.9 Multiplication and division;249
15.10;8.10 BCD conversion and arithmetic;254
15.11;8.11 Code conversion;259
15.12;8.12 Rate multipliers;259
15.13;8.13 LSI arithmetic devices;263
15.14;8.14 Arithmetic ICs;264
16;Chapter 9. Display Devices and Drivers;267
16.1;9.1 Introduction;267
16.2;9.2 Display devices;267
16.3;9.3 Alphanumeric displays;274
16.4;9.4 Display decoders and drivers;277
16.5;9.5 Multiplexing displays;279
16.6;9.6 Composite drivers;282
16.7;9.7 VDU fundamentals;283
16.8;9.8 Display-related ICs;285
17;Chapter 10. Event Driven Logic;287
17.1;10.1 Introduction;287
17.2;10.2 State diagrams;287
17.3;10.3 From state diagram to circuit;290
17.4;10.4 General observations;297
18;Chapter 11. Communications and Highways;298
18.1;11.1 Introduction;298
18.2;11.2 Transmission lines;298
18.3;11.3 Line driver ICs;302
18.4;11.4 Highway-based systems and buses;305
18.5;11.5 Data communications;307
18.6;11.6 Serial standards;312
18.7;11.7 Communication ICs;323
19;Chapter 12. Analog Interfacing;328
19.1;12.1 Introduction;328
19.2;12.2 The transmission gate;328
19.3;12.3 The Schmitt trigger;330
19.4;12.4 Digital to analog conversion;330
19.5;12.5 Analog to digital conversion;333
19.6;12.6 Analog/digital ICs;342
20;Chapter 13. Practical Considerations;344
20.1;13.1 Introduction;344
20.2;13.2 Construction techniques;344
20.3;13.3 Noise;350
20.4;13.4 Mixing logic families;354
20.5;13.5 Interfacing to the outside world;359
20.6;13.6 Maintenance and fault finding;364
20.7;13.7 Power suplies;370
20.8;13.8 Logic design with computers;373
21;Chapter 14. Device Information;383
21.1;14.1 Introduction;383
21.2;14.2 TTL and 74 series CMOS devices;383
21.3;14.3 B series CMOS devices;434
22;Index ;496