Tan / He Electromigration Modeling at Circuit Layout Level

1. Auflage 2013
ISBN: 978-981-4451-21-5
Verlag: Springer Singapore
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 103 Seiten

Reihe: SpringerBriefs in Reliability

Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.

Zielgruppe

Research

Autoren/Hrsg.

Tan, Cher Ming

He, Feifei

Inhaltsverzeichnis

Introduction.- 3D Circuit Model Construction and Simulation.- Comparison of EM Performance in Circuit Structure and Test Structure.- Interconnect EM Reliability Modeling at Circuit Layout Level.- Conclusion.