Testa / Pavesi | Optical Switching in Next Generation Data Centers | E-Book | www.sack.de
E-Book

E-Book, Englisch, 334 Seiten

Testa / Pavesi Optical Switching in Next Generation Data Centers


1. Auflage 2017
ISBN: 978-3-319-61052-8
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 334 Seiten

ISBN: 978-3-319-61052-8
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark



This book introduces the reader to the optical switching technology for its application to data centers. In addition, it takes a picture of the status of the technology and system architecture evolution and of the research in the area of optical switching in data center. The book is organized in four parts: the first part is focused on the system aspects of optical switching in intra-data center networking, the second part is dedicated to describing the recently demonstrated optical switching networks, the third part deals with the latest technologies developed to enable optical switching and, finally, the fourth part of the book outlines the future prospects and trends.

Dr. Francesco Testa is Principal Researcher at Ericsson Research in Pisa. He received the Engineering degree , summa cum laude, from the University of Rome in 1980. In 1982 he received a scholarship from Fondazione Ugo Bordoni in Rome, for researching on integrated optics.  He started working in 1985 at Alcatel-Face Italy on the research of coherent optical systems. He joined Ericsson in Rome  in 1991, where he worked on the first demonstrations of WDM transport  systems in the framework of the European projects RACE and ACTS. He was later involved in the hardware design and development of transmission and switching equipments for SDH, DECT, Local Multipoint Distribution System (LMDS),  GSM and Access networks products. He is currently engaged in the research on optical systems and photonic integrated technologies for 5G and data center networks. He has co-authored many papers in the field of optical communications and he was invited speaker at ECOC 2015 conference in Valencia and at the SPIE Conference on Silicon Photonics and Photonic Integrated Circuits in Brussels in 2012. He holds more than 40 patents. He is the technical coordinator of the IRIS project in the FP7 European Union Framework Program. He has co-authored a chapter of the book Silicon Photonics III edited by Lorenzo Pavesi and David Lockwood, Topics in Applied Physics vol 122 (Springer-Verlag, 2016). Dr. Lorenzo Pavesi is a Professor of Experimental Physics, director of the Nanoscience Laboratory  and head of the Department of Physics at the University of Trento. He received his PhD in Physics in 1990 at the Ecole Polytechnique Federale of Lausanne). He founded the research activity in semiconductor optoelectronics at the University of Trento and started several laboratories of photonics, growth and advanced treatment of materials. He was the first president and founder of the IEEE italian chapter on Nanotechnology. His interests encompass classical and quantum integrated silicon photonics.  He is a frequently invited reviewer, monitor or referee for photonics projects by several grant agencies. He is an author or co-author of more than 400 papers, author of several reviews, editor of more than 20 books (including the successful books Silicon Photonics I,II,III, Topics in Applied Physics, Springer-Verlag), author of 2 books and holds 7 patents. He is chief specialty editor of the section Optics and Photonics of Frontiers in Materials, and in the editorial board of APL Materials and Research Letters in Physics.. In 2010 and 2011 he was elected distinguished speaker of the IEEE- Photonics society. He is a fellow of IEEE and senior member of SPIE. He holds an H-number of 53 according to the web of science and of 64 according to Google Scholar.

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1;Preface;6
2;Contents;11
3;Part I: System Aspects of Intra Data Center Networking;13
3.1;Chapter 1: Photonics in Data Centers;14
3.1.1;1.1 Introduction: Recent Trends and Future Challenges of Data Centers and Cloud Computing;14
3.1.2;1.2 New Directions for Data Centers with Embedded Photonics;18
3.1.3;1.3 Arrival of Embedded Photonics, Silicon Photonics, and Heterogeneous 2.5D and 3D Integration;20
3.1.4;1.4 OE-PCBs and OE-Backplanes;22
3.1.4.1;1.4.1 High-Radix Optical Switches;22
3.1.5;1.5 Software-Defined Elasticity in Data Centers and Clients;25
3.1.6;1.6 Summary;28
3.1.7;References;29
3.2;Chapter 2: Optical Switching in Datacenters: Architectures Based on Optical Circuit Switching;33
3.2.1;2.1 Introduction;33
3.2.2;2.2 Optical Circuit Switching in Datacenter Networks;36
3.2.3;2.3 Agile Optical Datacenter Network Architecture;46
3.2.4;2.4 Conclusions;51
3.2.5;References;52
3.3;Chapter 3: Optical Switching in Data Centers: Architectures Based on Optical Packet/Burst Switching;55
3.3.1;3.1 Introduction;55
3.3.2;3.2 Data Center Networks: Requirements and Challenges;56
3.3.3;3.3 Optical Data Center Networks;58
3.3.4;3.4 Optical Packet and Burst Switching Technologies;59
3.3.4.1;3.4.1 Technical Challenges in OPS/OBS Data Centers;61
3.3.5;3.5 Optical DCN Architecture Based on OPS/OBS;62
3.3.5.1;3.5.1 Based on OBS;62
3.3.5.1.1;3.5.1.1 OBS with Fast Optical Switches;62
3.3.5.1.2;3.5.1.2 Optical Burst Rings;63
3.3.5.1.3;3.5.1.3 HOS Architecture;63
3.3.5.1.4;3.5.1.4 HOSA Architecture;64
3.3.5.1.5;3.5.1.5 Torus-Topology DCN;64
3.3.5.1.6;3.5.1.6 LIGHTNESS DCN Architecture;66
3.3.5.2;3.5.2 Based on OPS;66
3.3.5.2.1;3.5.2.1 IRIS Project: Photonic Terabit Routers;66
3.3.5.2.2;3.5.2.2 Petabit Optical Switch;67
3.3.5.2.3;3.5.2.3 Hi-LION;68
3.3.5.2.4;3.5.2.4 OSMOSIS Optical Packet Switch;69
3.3.5.2.5;3.5.2.5 Data Vortex;69
3.3.6;3.6 OPSquare DCN Based on Flow-Controlled Fast Optical Switches;70
3.3.6.1;3.6.1 Performance Investigation;72
3.3.7;3.7 Conclusions and Discussions;75
3.3.8;References;77
4;Part II: Demonstrations of Optical Switching in Data Center;80
4.1;Chapter 4: OSA: An Optical Switching Architecture for Data Center Networks with Unprecedented Flexibility;81
4.1.1;4.1 Introduction;81
4.1.2;4.2 Motivation and Background;83
4.1.2.1;4.2.1 A Motivating Example;83
4.1.2.2;4.2.2 Optical Networking Technologies;84
4.1.3;4.3 OSA Network Architecture;85
4.1.3.1;4.3.1 Building Blocks;85
4.1.3.2;4.3.2 Putting It All Together: OSA-2560;86
4.1.4;4.4 Network Optimization;87
4.1.4.1;4.4.1 Problem Formulation;88
4.1.4.2;4.4.2 Solution;89
4.1.5;4.5 Implementation;90
4.1.5.1;4.5.1 Test-bed Setup;90
4.1.5.2;4.5.2 Understanding the Optical Devices;91
4.1.5.3;4.5.3 Understanding the O-E-O Conversion;92
4.1.5.4;4.5.4 OSA System Performance;93
4.1.6;4.6 Discussion and Conclusion;96
4.1.7;References;98
4.2;Chapter 5: The Hi-Ring Architecture for Data Center Networks;100
4.2.1;5.1 Introduction;100
4.2.2;5.2 The Hi-Ring Architecture and Multidimensional Switching;101
4.2.3;5.3 Optical Subwavelength Switching and Synchronization;105
4.2.4;5.4 On-Chip Integration Using Silicon Photonics;109
4.2.5;5.5 Perspectives and Research Directions;112
4.2.6;References;112
4.3;Chapter 6: Low-Latency Interconnect Optical Network Switch (LIONS);114
4.3.1;6.1 Introduction;114
4.3.2;6.2 Active LIONS Demonstrations;115
4.3.3;6.3 LIONS-LB Testbed Demonstration;117
4.3.4;6.4 All-Optical TOKEN/TONAK Demonstrator;120
4.3.5;6.5 Passive LIONS Demonstrations;127
4.3.6;6.6 Hierarchical All-to-All Eight-Node Demo;128
4.3.7;6.7 Flexible Bandwidth Optical Data Center Core Network with All-to-All Interconnectivity;129
4.3.8;6.8 Conclusions;133
4.3.9;References;134
4.4;Chapter 7: Torus-Topology Data Center Networks with Hybrid Optoelectronic Routers;135
4.4.1;7.1 Introduction;135
4.4.2;7.2 Torus Topology;136
4.4.3;7.3 Torus Data Center Networks;139
4.4.3.1;7.3.1 Optical Packet Switching;140
4.4.3.2;7.3.2 Optical Circuit Switching;142
4.4.3.3;7.3.3 Virtual Optical Circuit Switching;143
4.4.4;7.4 Hybrid Optoelectronic Router (HOPR);144
4.4.5;7.5 Perspectives and Research Directions;149
4.4.6;References;150
4.5;Chapter 8: LIGHTNESS: All-Optical SDN-enabled Intra-­DCN with Optical Circuit and Packet Switching;152
4.5.1;8.1 Introduction;152
4.5.2;8.2 LIGHTNESS Data Plane Architecture;153
4.5.3;8.3 LIGHTNESS Control Plane Architecture;156
4.5.4;8.4 Technology Enablers for Flexible OCS/OPS;158
4.5.4.1;8.4.1 FPGA-Based Network Interface Card (NIC);158
4.5.4.2;8.4.2 OPS Module;159
4.5.5;8.5 Experimental Demonstration and Evaluation;160
4.5.5.1;8.5.1 Overall Experimental Architecture;160
4.5.5.2;8.5.2 All-Optical Experimental Data Plane;163
4.5.5.3;8.5.3 SDN-Enabled Experimental Control Plane;163
4.5.5.4;8.5.4 Optical Data Center Virtualization Demonstration;164
4.5.5.5;8.5.5 Experimental Results and Evaluation;165
4.5.6;8.6 Conclusion: Discussions;167
4.5.7;References;169
4.6;Chapter 9: Hybrid OPS/EPS Photonic Ethernet Switch and Pure Photonic Packet Switch;171
4.6.1;9.1 Introduction;171
4.6.2;9.2 Hybrid OPS/EPS;172
4.6.2.1;9.2.1 Photonic Functions of Hybrid OPS/EPS;174
4.6.2.2;9.2.2 Experimental Setup of Hybrid OPS/EPS;176
4.6.3;9.3 Pure Photonic Packet Switching;178
4.6.3.1;9.3.1 Photonic Functions of Pure Photonic Packet Switch;179
4.6.3.2;9.3.2 Experimental Example and Results;183
4.6.4;9.4 Scalability of Photonic Packet Switch;185
4.6.5;9.5 Discussion and Conclusion;186
4.6.6;References;187
4.7;Chapter 10: OPMDC: Optical Pyramid Data Center Network;188
4.7.1;10.1 Introduction;188
4.7.2;10.2 OPMDC Architecture;189
4.7.2.1;10.2.1 Internal Design of ROADM and WXC Nodes;191
4.7.2.1.1;10.2.1.1 Tier-1 ROADM Node;192
4.7.2.1.2;10.2.1.2 Tier-2 WXC Node;193
4.7.2.1.3;10.2.1.3 Tier-3 WXC Node;194
4.7.2.2;10.2.2 Edge Capacity and Structure;194
4.7.3;10.3 Wavelength Allocation Strategies;196
4.7.3.1;10.3.1 Strategy 1: Static Wavelength Pre-allocation;196
4.7.3.2;10.3.2 Strategy 2: Relay-Based Wavelength Allocation;197
4.7.3.3;10.3.3 Strategy 3: Dynamic Wavelength Allocation;198
4.7.4;10.4 Prototype and Performance Assessment;199
4.7.4.1;10.4.1 OPMDC Prototyping System;199
4.7.4.2;10.4.2 Performance Assessment;199
4.7.4.3;10.4.3 Packet Latency Performance;201
4.7.5;10.5 Conclusions and Research Directions;202
4.7.6;References;202
5;Part III: Technologies for Optical Switching in Data Centers;204
5.1;Chapter 11: Commercial Optical Switches;205
5.1.1;11.1 Introduction;205
5.1.2;11.2 Microelectromechanical System-Based Optical Switch;206
5.1.3;11.3 Beam-Steering Optical Switch;209
5.1.4;11.4 Liquid Crystal Optical Switch;210
5.1.5;11.5 Electro-optic Switch;212
5.1.6;11.6 Semiconductor Optical Amplifier-Based Switch;214
5.1.7;11.7 Thermo-optic Switch;216
5.1.8;11.8 Comparisons and Discussions;218
5.1.9;References;219
5.2;Chapter 12: Silicon Photonics Switch Matrices: Technologies and Architectures;222
5.2.1;12.1 Introduction;222
5.2.2;12.2 Physical Effects and Mechanisms for Optical Switching in Silicon;223
5.2.2.1;12.2.1 Plasma Dispersion Effect;224
5.2.2.2;12.2.2 Thermo-optic Effect;227
5.2.3;12.3 Integrated Switching Cell Technologies;229
5.2.3.1;12.3.1 Mach-Zehnder Interferometer (MZI) Switching Cell;230
5.2.3.2;12.3.2 Resonant Switching Cell;232
5.2.3.3;12.3.3 Micro-electromechanical System (MEMS) Switching Cell;233
5.2.4;12.4 Integrated Matrices with ?s Response Time for Optical Circuit Switching;235
5.2.4.1;12.4.1 Crossbar Switch Architecture;235
5.2.4.1.1;12.4.1.1 64 × 64 Digital Silicon Photonics MEMS Switch Matrix;237
5.2.4.1.2;12.4.1.2 8 × 7 Switch Matrix Based on Resonant Switching Cells;239
5.2.4.2;12.4.2 PILOSS Switch Architecture;240
5.2.4.2.1;12.4.2.1 32 × 32 Si-Wire Switch Matrix;242
5.2.4.2.2;12.4.2.2 Micro-Opto-Electro-Mechanical Switch (MOEMS) Matrix;243
5.2.4.3;12.4.3 Switch and Select Architecture;244
5.2.4.3.1;12.4.3.1 8 × 8 Switch and Select Optical Matrix;245
5.2.5;12.5 Integrated Matrices with ns Response Time for Optical Packet Switching;246
5.2.5.1;12.5.1 Benes Switch Architecture;247
5.2.5.1.1;12.5.1.1 16 × 16 Benes Switching Matrix;248
5.2.5.1.2;12.5.1.2 32 × 32 Benes Switching Matrix;250
5.2.6;12.6 Silicon Photonics Wavelength-Selective Switch Matrix;250
5.2.7;12.7 Switch Matrices Comparison Table;254
5.2.8;12.8 Perspectives and Research Directions;254
5.2.9;References;257
5.3;Chapter 13: Trends in High-Speed Interconnects for Datacenter Networking: Multidimensional Formats and Their Enabling DSP;261
5.3.1;13.1 Introduction;261
5.3.2;13.2 Representation of a Lightwave and Polarization Rotation in Jones and Stokes Spaces;263
5.3.3;13.3 Evolution of Multidimensional Modulation Formats and Their Transceiver Architectures;265
5.3.4;13.4 Enabling DSP for Multidimensional Formats;269
5.3.5;13.5 State-of-the-Art Experimental Results Using Transceivers Realized by Discrete Components;272
5.3.6;13.6 Conclusion and Future Research Avenues;275
5.3.7;References;276
5.4;Chapter 14: Trends in High Speed Interconnects: InP Monolithic Integration;278
5.4.1;14.1 Introduction;278
5.4.2;14.2 The Building Blocks;279
5.4.3;14.3 Monolithic Technology;281
5.4.4;14.4 Transmitters;282
5.4.5;14.5 Receivers;286
5.4.6;14.6 Optical Switching;288
5.4.7;14.7 Outlook;290
5.4.8;References;291
6;Part IV: Prospects and Future Trends;297
6.1;Chapter 15: The Future of Switching in Data Centers;298
6.1.1;15.1 Introduction;298
6.1.2;15.2 Design Considerations for Advanced Optical Interconnects;300
6.1.3;15.3 Switch Architecture and Network Topology;302
6.1.4;15.4 Technology Trends;305
6.1.4.1;15.4.1 On-Chip Optical Interconnects;305
6.1.4.2;15.4.2 On-Board Optical Interconnects;306
6.1.4.3;15.4.3 System-Level Interconnection Network;308
6.1.5;15.5 Point-to-Point Interconnects;308
6.1.6;15.6 Optically Switched Interconnects;309
6.1.7;15.7 Enabling Technologies for Next-Generation System-­Level Optical Interconnection Networks;311
6.1.7.1;15.7.1 High-Capacity Optical Links;311
6.1.7.2;15.7.2 Bandwidth-Variable and Software-Controllable Optical Transceivers;313
6.1.7.3;15.7.3 Dynamic and Flexible Optical Switching Nodes;313
6.1.7.4;15.7.4 Energy-Efficient Communication Systems and Networks;314
6.1.7.5;15.7.5 Multilayer Software-Defined Networking;314
6.1.8;15.8 Conclusions and Future Research Directions;315
6.1.8.1;15.8.1 Optimizing the Architecture of Optically Switched Interconnects;317
6.1.8.2;15.8.2 Cross-Layer and Cross-Level Performance Analysis;318
6.1.8.3;15.8.3 Elastic and Software-Defined Optical Interconnects;318
6.1.8.4;15.8.4 Efficient Optical Interconnects;320
6.1.8.5;15.8.5 Scalable Routing and Load Balancing;321
6.1.8.6;15.8.6 Low-Latency and Efficient Optical Networks on Chip (NoC);321
6.1.9;References;322
7;Correction to: Silicon Photonics Switch Matrices: Technologies and Architectures;326
7.1;Correction to: Chapter 12 in: F. Testa, L. Pavesi (eds.), Optical Switching in Next Generation Data Centers, https://doi.org/10.1007/978-3-319-61052-8_12;326
8;Index;327



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