Wiemann Standardized Functional Verification

1. Auflage 2007
ISBN: 978-0-387-71733-3
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 276 Seiten

The Integrated Circuit (IC) industry has gone without a standardized verification approach for decades. This book defines a uniform, standardizable methodology for verifying the logical behavior of an integrated circuit, whether an I/O controller, a microprocessor, or a complete digital system. This book will help Engineers and managers responsible for IC development to bring a single, standards-based methodology to their R & D efforts, cutting costs and improving results.

Autoren/Hrsg.

Wiemann, Alan

Inhaltsverzeichnis

1;Preface;5
1.1;What this book is about;7
1.2;What this book is not about;8
1.3;Who should read this book;9
1.4;Scope and Organization of this book;10
2;Acknowledgements;11
3;Table of Contents;12
4;Chapter 1 – A Brief Overview of Functional Verification;17
4.1;1.1 Costs and Risk;17
4.2;1.2 Verification and Time to Market;18
4.3;1.3 Verification and Development Costs;18
4.4;1.4 But any L essons L earned?;19
4.5;1.5 Functional Verification in a Nutshell;20
4.6;1.6 Principles of Constrained Random Verification;21
4.7;1.7 Standardized Functional Verification;22
4.8;1.8 Summary;23
5;Chapter 2 – Analytical Foundation;25
5.1;2.1 A Note on Terminology;25
5.2;2.2 DUTs, DUVs, and Targets;25
5.3;2.3 Linear Algebra for Digital System Verification;26
5.4;2.4 Standard Variables;28
5.5;2.5 Ranges of Variables;29
5.6;2.6 Rules and Guidelines;30
5.7;2.7 Variables of Connectivity;32
5.8;2.8 Variables of Activation;37
5.9;2.9 Variables of Condition;40
5.10;2.10 Morphs;43
5.11;2.11 Variables of Stimulus and Response;45
5.12;2.12 Error Imposition;49
5.13;2.13 Generating Excitement;51
5.14;2.14 Special Cases;51
5.15;2.15 Summary;53
5.16;References;54
6;Chapter 3 – Exploring Functional Space;55
6.1;3.1 Functional Closure;55
6.2;3.2 Counting Function Points;56
6.3;3.3 Condensation in the Functional Space;63
6.4;3.4 Connecting the Dots;66
6.5;3.5 Analyzing an 8-entry Queue;69
6.6;3.6 Reset in the VTG;75
6.7;3.7 Modeling Faulty Behavior;79
6.8;3.8 Back to those Special Cases;80
6.9;3.9 A L ittle Graph Theory;81
6.10;3.10 Reaching Functional Closure;84
6.11;3.11 Summary;86
7;Chapter 4 – Planning and Execution;87
7.1;4.1 Managing Verification Projects;87
7.2;4.2 The Goal;88
7.3;4.3 Executing the Plan to Obtain Results;89
7.4;4.4 Soft Prototype and Hard Prototype;94
7.5;4.5 The Verification Plan;95
7.6;4.6 Instances, Morphs, and Targets (§ 1);97
7.7;4.7 Clock Domain Crossings (§ 1);97
7.8;4.8 Verifying Changes to an Existing Device (§ 1);99
7.9;4.9 Interpretation of the Specification (§ 1);99
7.10;4.10 Instrumenting the Prototype (§ 2);103
7.11;4.11 Standard Results (§ 3);107
7.12;4.12 Setting Goals for Coverage and Risk (§ 4);110
7.13;4.13 Architecture for Verification Software (§ 5);111
7.14;4.14 Change Management (§ 6);126
7.15;4.15 Organizing the Teams (§ 7);127
7.16;4.16 Tracking Progress (§ 8);131
7.17;4.17 Related Documents (§ 9);134
7.18;4.18 Scope, Schedule and Resources (§ 10);134
7.19;4.19 Summary;135
7.20;References;136
8;Chapter 5 – Normalizing Data;137
8.1;5.1 Estimating Project Resources;137
8.2;5.2 Power and Convergence;138
8.3;5.3 Factors to Consider in using Convergence;140
8.4;5.4 Complexity of a Target;142
8.5;5.5 Scaling Regression using Convergence;145
8.6;5.6 Normalizing Cycle Counts with Complexity;149
8.7;5.7 Using Normalized Cycles in Risk Assessment;150
8.8;5.8 Bug Count as a Function of Complexity;151
8.9;5.9 Comparing Size and Complexity;152
8.10;5.10 Summary;152
8.11;References;152
9;Chapter 6 – Analyzing Results;153
9.1;6.1 Functional Coverage;153
9.2;6.2 Standard Results for Analysis;154
9.3;6.3 Statistically Sampling the Function Space;154
9.4;6.4 Measures of Coverage;155
9.5;6.5 Code Coverage;156
9.6;6.6 State Reachability in State Machines;158
9.7;6.7 Arc Transversability in State Machines;159
9.8;6.8 Fault Coverage;159
9.9;6.9 VTG Coverage;160
9.10;6.10 Strong Measures and Weak Measures;160
9.11;6.11 Standard Measures of Function Space Coverage;161
9.12;6.12 Specific Measures and General Measures;162
9.13;6.13 Specific Measures for Quadrant I;164
9.14;6.14 General Measures for Quadrants II, III, and IV;165
9.15;6.15 Multiple Clock Domains;165
9.16;6.16 Views of Coverage;166
9.17;6.17 Standard Views of Functional Coverage;171
9.18;6.18 Summary;172
9.19;References;172
10;Chapter 7 – Assessing Risk;173
10.1;7.1 Making Decisions;173
10.2;7.2 Some Background on Risk Assessment;175
10.3;7.3 Successful Functional Verification;176
10.4;7.4 Knowledge and Risk;180
10.5;7.5 Coverage and Risk;182
10.6;7.6 Data-driven Risk Assessment;183
10.7;7.7 VTG Arc Coverage;184
10.8;7.8 Using Q to Estimate Risk of a Bug;185
10.9;7.9 Bug Count as a Function of Z;190
10.10;7.10 Evaluating Commercial IP;190
10.11;7.11 Evaluating IP for a Single Application;192
10.12;7.12 Nearest Neighbor Analysis;192
10.13;7.13 Summary;195
10.14;References;197
11;Appendix – Functional Space of a Queue;198
11.1;A.1 Basic 8-entry Queue;198
11.2;A.2 Adding an Indirect Condition;201
11.3;A.3 Programmable High- and Low-water Marks;205
11.4;A.4 Size of the Functional Space for this Queue;205
11.5;A.5 Condensation in the Functional Space;206
11.6;A.6 No O ther Variables?;208
11.7;A.7 VTGs for 8-entry Queue with Programmable HWM & LWM;208
12;Index;281