E-Book, Englisch, 553 Seiten, eBook
Williams Digital VLSI Design with Verilog
2. Auflage 2014
ISBN: 978-3-319-04789-8
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
A Textbook from Silicon Valley Polytechnic Institute
E-Book, Englisch, 553 Seiten, eBook
ISBN: 978-3-319-04789-8
Verlag: Springer International Publishing
Format: PDF
Kopierschutz: 1 - PDF Watermark
This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs. The author includes everything an engineer needs for in-depth understanding of the Verilog language: Syntax, synthesis semantics, simulation and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book. For readers with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book. A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test. A concluding presentation of special topics includes System Verilog and Verilog-AMS.
Zielgruppe
Research
Autoren/Hrsg.
Weitere Infos & Material
Introductory Material.- Week 1 Class 1.- Week 1 Class 2.- Week 2 Class 1.- Week 2 Class 2.- Week 3 Class 1.- Week 3 Class 2.- Week 4 Class 1.- Week 4 Class 2.- Week 5 Class 1.- Week 5 Class 2.- Week 6 Class 1.- Week 6 Class 2.- Week 7 Class 1.- Week 7 Class 2.- Week 8 Class 1.- Week 8 Class 2.- Week 9 Class 1.- Week 9 Class 2.- Week 10 Class 1.- Week 10 Class 2.- Week 11 Class 1.- Week 11 Class 2.- Week 12 Class 1.- Week 12 Class 2.