E-Book, Englisch, 266 Seiten
Kourtev / Taskin / Friedman Timing Optimization Through Clock Skew Scheduling
1. Auflage 2008
ISBN: 978-0-387-71056-3
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark
E-Book, Englisch, 266 Seiten
ISBN: 978-0-387-71056-3
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark
This book details timing analysis and optimization techniques for circuits with level-sensitive memory elements. It contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling. Coverage also provides a framework for and results from implementing timing optimization algorithms in a parallel computing environment.
Autoren/Hrsg.
Weitere Infos & Material
1;Preface;5
2;Contents;8
3;List of Figures;12
4;1 Introduction;16
5;2 VLSI Systems;22
6;3 Signal Delay in VLSI Systems;34
7;4 Timing Properties of Synchronous Systems;55
8;5 Clock Skew Scheduling and Clock Tree Synthesis;85
9;6 Clock Skew Scheduling of Level-Sensitive Circuits;111
10;7 Clock Skew Scheduling for Improved Reliability;135
11;8 Delay Insertion and Clock Skew Scheduling;158
12;9 Practical Considerations;179
13;10 Clock Skew Scheduling in Rotary Clocking Technology;194
14;11 Experimental Results;216
15;12 Conclusions;253
16;References;257
17;Index;268
