E-Book, Englisch, 164 Seiten
Kumar / Corporaal / Mesman Multimedia Multiprocessor Systems
1. Auflage 2010
ISBN: 978-94-007-0083-3
Verlag: Springer-Verlag
Format: PDF
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)
Analysis, Design and Management
E-Book, Englisch, 164 Seiten
ISBN: 978-94-007-0083-3
Verlag: Springer-Verlag
Format: PDF
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)
Modern multimedia systems are becoming increasingly multiprocessor and heterogeneous to match the high performance and low power demands placed on them by the large number of applications. The concurrent execution of these applications causes interference and unpredictability in the performance of these systems. In , an analysis mechanism is presented to accurately predict the performance of multiple applications executing concurrently. With high consumer demand the time-to-market has become significantly lower. To cope with the complexity in designing such systems, an automated design-flow is needed that can generate systems from a high-level architectural description such that they are not error-prone and consume less time. Such a design methodology is presented for multiple use-cases -- combinations of active applications. A resource manager is also presented to manage the various resources in the system, and to achieve the goals of performance prediction, admission control and budget enforcement.
Autoren/Hrsg.
Weitere Infos & Material
1;Preface;5
1.1;Preface and Outline;5
1.2;Aim of This Book;6
1.3;Audience;7
1.4;Accompanying Material;8
1.5;Organization of This Book;8
2;Contents;9
3;List of Figures;11
4;List of Tables;15
5;Trends and Challenges in Multimedia Systems;17
5.1;Trends in Multimedia Systems Applications;19
5.2;Trends in Multimedia Systems Design;20
5.3;Key Challenges in Multimedia Systems Design;26
5.3.1;Analysis;27
5.3.2;Design;29
5.3.3;Management;30
5.4;Design Flow;31
5.5;Book Overview;33
6;Application Modeling and Scheduling;34
6.1;Application Model and Specification;35
6.2;Introduction to SDF Graphs;37
6.2.1;Modeling Auto-concurrency;38
6.2.2;Modeling Buffer Sizes;39
6.3;Comparison of Dataflow Models;40
6.3.1;Kahn Process Network;41
6.3.2;Scenario Aware Dataflow;41
6.3.3;Boolean Dataflow;42
6.3.4;Cyclo Static Dataflow;42
6.3.5;Computation Graphs;42
6.3.6;Synchronous Dataflow;43
6.3.7;Homogeneous Synchronous Dataflow;43
6.4;Performance Modeling;43
6.4.1;Steady-State vs Transient Behaviour;44
6.4.2;Throughput Analysis of (H)SDF Graphs;46
6.5;Scheduling Techniques for Dataflow Graphs;47
6.6;Analyzing Application Performance on Hardware;49
6.6.1;Static Order Analysis;49
6.6.2;Deadlock Analysis;53
6.6.3;Dynamic Order Analysis;54
6.7;Composability;56
6.7.1;Performance Estimation;57
6.8;Static vs Dynamic Ordering;60
6.9;Conclusions;61
7;Probabilistic Performance Prediction;63
7.1;Basic Probabilistic Analysis;66
7.1.1;Generalizing the Analysis;67
7.1.2;Extending to N Actors;69
7.1.3;Reducing Complexity;72
7.1.3.1;Composability-Based Approach;73
7.1.3.2;Computing Inverse of Formulae;74
7.2;Iterative Analysis;75
7.2.1;Terminating Condition;80
7.2.2;Conservative Iterative Analysis;81
7.2.3;Parametric Throughput Analysis;82
7.2.4;Intra-task Dependencies;82
7.2.5;Handling Other Arbiters;83
7.3;Experiments;83
7.3.1;Setup;84
7.3.2;Results and Discussion - Basic Analysis;84
7.3.3;Results and Discussion - Iterative Analysis;86
7.3.3.1;Validating the Probabilistic Distribution;86
7.3.3.2;Application Throughput;90
7.3.4;Varying Execution Times;93
7.3.5;Mapping Multiple Actors;94
7.3.6;Mobile Phone Case Study;94
7.3.7;Comparison with an FPGA Multiprocessor Implementation;96
7.3.8;Implementation Results on an Embedded Processor;98
7.4;Suggested Readings;99
7.5;Conclusions;100
8;Resource Management;101
8.1;Off-line Derivation of Properties;102
8.1.1;Performance Specification;104
8.2;On-line Resource Manager;105
8.2.1;Admission Control;106
8.2.1.1;Performance Predictor;106
8.2.1.2;Resource Assignment;107
8.2.1.3;Task Migration;108
8.2.2;Resource Budget Enforcement;108
8.2.2.1;Motivating Example;109
8.2.2.2;Suspending Applications;110
8.2.2.3;Suspension Example;110
8.2.2.4;Communication Overhead;111
8.2.2.5;Arbiter vs Resource Manager;112
8.3;Achieving Predictability Through Suspension;113
8.3.1;Reducing Complexity;115
8.3.2;Dynamism vs Predictability;116
8.4;Experiments;116
8.4.1;DSE Case Study;116
8.4.2;Predictability Through Suspension;119
8.5;Suggested Readings;121
8.6;Conclusions;123
9;Multiprocessor System Design and Synthesis;125
9.1;Performance Evaluation Framework;127
9.2;MAMPS Flow Overview;128
9.2.1;Application Specification;129
9.2.2;Functional Specification;130
9.2.3;Platform Generation;130
9.3;Tool Implementation;132
9.3.1;Resource Manager;133
9.4;Experiments and Results;133
9.4.1;Reducing the Implementation Gap;134
9.4.2;DSE Case Study;137
9.4.2.1;Design Time;138
9.5;Suggested Readings;139
9.6;Conclusions;141
10;Multiple Use-cases System Design;142
10.1;Merging Multiple Use-cases;143
10.1.1;Generating Hardware for Multiple Use-cases;144
10.1.2;Generating Software for Multiple Use-cases;145
10.1.3;Combining the Two Flows;146
10.2;Use-case Partitioning;147
10.2.1;Hitting the Complexity Wall;149
10.2.2;Reducing the Execution Time;149
10.2.3;Reducing Complexity;150
10.3;Estimating Area: Does It Fit?;151
10.3.1;Packing the Most;153
10.4;Experiments and Results;154
10.4.1;Use-case Partitioning;154
10.4.2;Mobile-Phone Case Study;155
10.4.2.1;Reconfiguration Time;156
10.5;Suggested Readings;156
10.6;Conclusions;157
11;Conclusions and Open Problems;158
11.1;Conclusions;158
11.2;Open Problems;160
12;About the Authors;163
13;Glossary;165
14;References;167
15;Index;173




