Leyssenne / Kerhervé / Deval Reconfigurable RF Power Amplifiers on Silicon for Wireless Handsets

1. Auflage 2011
ISBN: 978-94-007-0425-1
Verlag: Springer Netherlands
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 168 Seiten

Reihe: Analog Circuits and Signal Processing

Reconfigurable RF Power Amplifiers on Silicon for Wireless Handsets is intended to designers and researchers who have to tackle the efficiency/linearity trade-off in modern RF transmitters so as to extend their battery lifetime. High data rate 3G/4G standards feature broad channel bandwidths, high dynamic range and critical envelope variations which generally forces the power amplifier (PA) to operate in a low efficiency 'backed-off' regime. Classic efficiency enhancement techniques such as Envelope Elimination and Restoration reveal to be little compliant with handset-dedicated PA implementation due to their channel-bandwidth-limited behavior and their increased die area consumption and/or bill-of-material. The architectural advances that are proposed in this book circumvent these issues since they put the stress on low die-area /low power-consumption control circuitry. The advantages of silicon over III/V technologies are highlighted by several analogue signal processing techniques that can be implemented on-chip with a power amplifier. System-level and transistor-level simulations are combined to illustrate the principles of the proposed power adaptive solutions. Measurement on BICMOS demonstrators allows validating the functionality of dynamic linearity/efficiency management. In Reconfigurable RF Power Amplifiers on Silicon for Wireless Handsets, PA designers will find a review of technologies, architectures and theoretical formalisms (Volterra series...) that are traditionally related to PA design. Specific issues that one encounters in power amplifiers (such as thermal / memory effects, stability, VSWR sensitivity...) and the way of overcoming them are also extensively considered throughout this book.

Laurent Leyssenne received the Ph.D. degree in Electrical Engineering from University of Bordeaux, France in 2009. His main field of research is the design of RF power amplifiers. Eric Kerhervé received the Ph.D. degree in Electrical Engineering from University of Bordeaux, France in 1994. He joined ENSEIRB and the IMS Laboratory in 1996, where he is currently a Professor in Microelectronics and Microwave applications. He has authored or co-authored more than 190 technical papers, and was awarded 17 patents. Yann Deval received the Ph.D. degree from the University of Bordeaux, France, in 1994. He joined the University of Bordeaux in 1994 as an Assistant Professor, and became a Full Professor at ENSEIRB, in 2004. From 1994 to 2006, he pursued his research in the domain of analog and radiofrequency integrated circuits at IMS Microelectronics laboratory. Since 2007, he is in charge of the IC Design Group at IMS. He has published more than 90 papers in international journals and conference proceedings.

Autoren/Hrsg.

Leyssenne, Laurent

Kerhervé, Eric

Deval, Yann

Inhaltsverzeichnis

1;Preface;6
2;Acknowledgments;8
3;Contents;9
4;Abbreviations;12
5;1 Mobile Phone Transmitters for Wireless Standards: Systems, Architectures and Technologies;16
5.1;1.1 RF Cellular/Data Transmission Standards and Related Handset Uplink Architectures;16
5.1.1;1.1.1 Introduction;16
5.1.2;1.1.2 Second Generation Radiofrequency Standards and Their Implication on Uplink Architecture;17
5.1.3;1.1.3 Cellular Third Generation CDMA-Based Standards;19
5.1.3.1;1.1.3.1 Currently Used 3G Standards;19
5.1.3.2;1.1.3.2 Spread Spectrum Technique: Principle, Advantages and Limitations;22
5.1.3.3;1.1.3.3 Description of European 3G: WCDMA and Its Uplink High Data-Rate Extension HSUPA;22
5.1.3.4;1.1.3.4 WCDMA Linearity Requirements;25
5.1.3.5;1.1.3.5 WCDMA Dynamic Range;26
5.1.3.6;1.1.3.6 WCDMA Noise Requirements;27
5.1.3.7;1.1.3.7 Uplink WCDMA Extension: High Speed Uplink Packet Access;28
5.1.3.8;1.1.3.8 WCDMA Specification Summary;28
5.1.4;1.1.4 Data Transmission Wireless Standards;29
5.1.4.1;1.1.4.1 Generalities About OFDM Based Standards;29
5.1.4.2;1.1.4.2 OFDM Principle;29
5.1.4.3;1.1.4.3 OFDM Robustness to Multi-Path Fading;30
5.1.4.4;1.1.4.4 OFDMA vs. SC-FDMA ;31
5.1.4.5;1.1.4.5 Summary of WLAN, WIMAX Main Characteristics;31
5.1.5;1.1.5 Power Back-Off Determination;33
5.2;1.2 Power Amplifier Topologies for User Equipment;33
5.2.1;1.2.1 Introduction on Power Amplifiers Typical Issues;33
5.2.2;1.2.2 Base Stations Dedicated Efficiency Enhancement PA Architectures;33
5.2.2.1;1.2.2.1 Outphasing Power Amplifiers;33
5.2.2.2;1.2.2.2 Doherty Architecture;35
5.2.3;1.2.3 Uplink-Compliant Efficiency Enhancement PA Architectures;36
5.2.3.1;1.2.3.1 Envelope Elimination and Restoration;36
5.2.3.2;1.2.3.2 Envelope Tracking;40
5.2.3.3;1.2.3.3 PA Architecture Using Band-Pass Delta--Sigma Modulator;41
5.2.4;1.2.4 Conclusion;42
5.3;1.3 Technologies for Handset PA Design;42
5.3.1;1.3.1 Silicon Versus III/V;42
5.3.2;1.3.2 Presentation of ST Microelectronics BICMOS 0.25 µmTechnology;44
5.3.2.1;1.3.2.1 Process Brief Overview;44
5.3.2.2;1.3.2.2 Laterally Doped MOS Transistors;44
5.3.2.3;1.3.2.3 Heterojunction Bipolar Transistors;50
5.3.2.4;1.3.2.4 Discussion About Silicon Active Devices;56
5.3.3;1.3.3 PA Protection Against VSWR Variations;56
5.3.4;1.3.4 Presentation of ST Microelectronics Integrated PAssive Device (IPAD) Technology;57
5.4;References;58
6;2 Discretized Reconfiguration Techniques for Radiofrequency Power Amplifiers;63
6.1;2.1 Introduction on Fragmented Power Amplifiers;63
6.2;2.2 Power Amplifier Bypass Technique;66
6.2.1;2.2.1 Introduction;66
6.2.2;2.2.2 Bypass Topology;67
6.2.3;2.2.3 Experimental Results;69
6.3;2.3 Reconfigurable Power Amplifier Based on Parallelized Switched Power Cells;74
6.3.1;2.3.1 Introduction on Discretized Power Amplifiers;74
6.3.2;2.3.2 Dynamic Modulation of Non-linear Kernels;77
6.4;2.4 Delta-Sigma Built-In Current Sensing in the Prospect of Power Amplifier Dynamic Reconfiguration;80
6.4.1;2.4.1 Delta-Sigma Modulation Basics;80
6.4.2;2.4.2 Power Detection via Delta-Sigma Built-In Current Sensing;80
6.4.2.1;2.4.2.1 Built-In-Current Sensor Principle;80
6.4.2.2;2.4.2.2 General Topology of Delta-Sigma Built-In Current Sensor;82
6.4.2.3;2.4.2.3 Example of a Low-Pass 1st Order 200 kHz Delta-Sigma Built-In Current Sensor;84
6.4.3;2.4.3 Dynamically Reconfigurable RF Power Amplifier Controlled via Delta-Sigma Built-In Current Sensor;86
6.4.3.1;2.4.3.1 Design Methodology;86
6.4.3.2;2.4.3.2 Theoretical Approach of Power Detection in a PA Control Architecture;87
6.4.3.3;2.4.3.3 Design of the Noise Shaping Transfer Function H (s);91
6.4.3.4;2.4.3.4 Management of Linearity/Efficiency Trade-Off via a 1-Bit Delta-Sigma BICS-Controlled Architecture;92
6.4.3.5;2.4.3.5 Management of Linearity/Efficiency Trade-Off via 3-Bit Delta-Sigma BICS-Controlled Architecture;94
6.4.3.6;2.4.3.6 Impact of VSWR Mismatch on a Delta–Sigma BICS-Controlled PA;99
6.4.3.7;2.4.3.7 Conclusion on Delta---Sigma BICS-Controlled Power Amplifiers;100
6.5;2.5 Delta-Sigma-Like Closed-Loop Dynamically Reconfigurable Power Amplifier;101
6.5.1;2.5.1 Principle;101
6.5.2;2.5.2 Architecture Synoptic, Block Diagram and Theory;101
6.5.2.1;2.5.2.1 Architecture Synoptic and Block Diagram;101
6.5.2.2;2.5.2.2 Non-linear Threshold Voltage Distribution;103
6.5.2.3;2.5.2.3 Theoretical Approach of This Architecture;104
6.5.3;2.5.3 Design Implementation;105
6.5.3.1;2.5.3.1 Differential Power Detector Architecture;105
6.5.3.2;2.5.3.2 Employed Power Detector Topology and Theory;106
6.5.4;2.5.4 Management of Linearity/Efficiency Trade-Off via 3-Bit Delta-Sigma-Like Closed-Loop Reconfigurable PA;108
6.5.5;2.5.5 Conclusion and Comparison with Delta--Sigma BICS-Controlled Architecture;112
6.5.6;2.5.6 Prospect Works Based on These Techniques;112
6.5.6.1;2.5.6.1 Combined Cartesian/Reconfigurable Dual Loop Architecture;112
6.5.6.2;2.5.6.2 Linearity Monitoring via Digital Signal Processing;113
6.6;References;113
7;3 Continuous Adaptive Bias Technique for Radiofrequency Power Amplifiers;115
7.1;3.1 Introduction and Theory;115
7.1.1;3.1.1 Introduction;115
7.1.2;3.1.2 Adaptive Power Amplifier Principle and Architecture;117
7.1.2.1;3.1.2.1 Principle;117
7.1.2.2;3.1.2.2 Diode-Linearizer;118
7.1.2.3;3.1.2.3 Overall PA Adaptive Bias Architecture;122
7.1.2.4;3.1.2.4 Theory of Linearity Optimization via Dual Adaptive Bias;127
7.1.2.5;3.1.2.5 Memory Effects and Adaptive Bias;132
7.2;3.2 Design and Measurement of the Integrated Passive Device Dedicated to PA Module;134
7.2.1;3.2.1 MOBILIS IPD Design;134
7.2.2;3.2.2 IPD Characterization;136
7.3;3.3 Design and Simulation of the Adaptive Bias Silicon PA ;138
7.3.1;3.3.1 PA Silicon Design;138
7.3.2;3.3.2 Simulations;139
7.3.2.1;3.3.2.1 Small-Signal Performance of the PA Module;139
7.3.2.2;3.3.2.2 Noise Performance of the PA Module;140
7.3.2.3;3.3.2.3 Continuous-Wave Performance of the PA Module;140
7.3.2.4;3.3.2.4 Dual-Tone Performance of the PA Module;143
7.3.2.5;3.3.2.5 PA Module Performance with a HPSK Modulated Signal;144
7.4;3.4 Measurement on PA Silicon and PA Module;147
7.4.1;3.4.1 Measurement on the Assembled PA Module;147
7.4.1.1;3.4.1.1 Small-Signal Measure;147
7.4.1.2;3.4.1.2 Large-Signal Measurement;148
7.4.1.3;3.4.1.3 Characterization of the Overall Transceiver Demonstrator;148
7.4.2;3.4.2 Measurement of Stand-Alone Silicon;150
7.4.2.1;3.4.2.1 Characterization Test-Bench;150
7.4.2.2;3.4.2.2 Characterization at 1.750GHz (DCS/EDGE Mode);151
7.4.2.3;3.4.2.3 Characterization at 1.950GHz (WCDMA Mode);155
7.4.2.4;3.4.2.4 Impact of Finely-Tuned Adaptive Bias on Linearity;158
7.4.2.5;3.4.2.5 Robustness to VSWR ;160
7.4.3;3.4.3 Discussion and Conclusion;161
7.5;References;163
8;General Conclusion;165
9;Appendix A Impact of Base/Emitter Degeneration on HBT Self-Heating Behavior;167
10;Appendix B Small-Signal Analysis of a Common-Source Power Stage;169
10.1;B.1 Introduction;169
10.2;B.2 Power Stage Input/Output Admittances;170
10.3;B.3 Power Stage Non-unilateral Trans-Conductance Gain;171
10.4;B.4 Power Stage Trans-Impedance Gain;171
10.5;B.5 Power Stage Transducer Gain;172
11;Appendix C Theory of Power and Volterra Series;173
11.1;C.1 Power Series;173
11.2;C.2 Volterra Series;173
12;Appendix D Analysis of Stability in Power Amplifiers;175
12.1;D.1 Theory of Unconditional Stability;175
12.2;D.2 Practical Analysis of PA Stability;176
13;Index;179