Reis / Cao / Wirth Circuit Design for Reliability

1. Auflage 2014
ISBN: 978-1-4614-4078-9
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 272 Seiten

Reihe: Engineering (R0)

This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units.  The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.

Zielgruppe

Research

Autoren/Hrsg.

Reis, Ricardo

Cao, Yu

Wirth, Gilson

Inhaltsverzeichnis

Introduction.- Recent Trends in Bias Temperature Instability.- Charge trapping phenomena in MOSFETS: From Noise to Bias Temperature Instability.- Atomistic Simulations on Reliability.- On-chip characterization of statistical device degradation.- Circuit Resilience Roadmap.- Layout Aware Electromigration Analysis of Power/Ground Networks.- Power-Gating for Leakage Control and Beyond.- Soft Error Rate and Fault Tolerance Techniques for FPGAs.