Stefanovic / Kayal Structured Analog CMOS Design

1. Auflage 2008
ISBN: 978-1-4020-8573-4
Verlag: Springer Netherland
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 283 Seiten, Web PDF

Reihe: Engineering (R0)

describes a structured analog design approach that makes it possible to simplify complex analog design problems and develop a design strategy that can be used for the design of large number of analog cells. It intentionally avoids treating the analog design as a mathematical problem, developing a design procedure based on the understanding of device physics and approximations that give insight into parameter interdependences.

The basic design concept consists in analog cell partitioning into the basic analog structures and sizing of these basic analog structures in a predefined procedural design sequence. The procedural design sequence ensures the correct propagation of design specifications, the verification of parameter limits and the local optimization loops. The proposed design procedure is also implemented as a CAD tool that follows this book.

Zielgruppe

Research

Autoren/Hrsg.

Stefanovic, Danica

Kayal, Maher

Inhaltsverzeichnis

Transistor level design.- Bsim To Ekv Conversion.- Basic analog structures.- Procedural design scenarios.- PAD tool.- Topology variants.- Practical example: the design of analog amplifiers in the Delta-Sigma modulator system.

Leseproben

"
Different MOS transistor models and their basic characteristics are discussed in the beginning of this chapter. The requirements that a MOS model must fulfill to be suitable for the design at the transistor level are identified. Then, an overview of transistor parameters needed for design of analog structures is provided. Finally, a transistor-level design approach based on the choice of the inversion factor and the transistor length is proposed. It includes the design recipes for hand-calculations, and the analyses of parameter limits and parameter optima.

2.1 MOS transistor model

The fundamental step of any analog design procedure is the design at the transistor level, that means sizing of each transistor to achieve the required specifications. To accomplish this task successfully, it is essential to understand the transistor behavior and to calculate the important parameters. Since the transistor behavior is described by its model, a ""good analog"" model is prerequisite. Several studies are presented in [1]-[3] with the aim of defining what is a good MOS transistor model. The most important features are analyzed from the point of view of device modeling for analog design purposes. The general conclusions are resumed hereafter:

• A good transistor model is based on physical behavior covering significant physical effects such as non-uniform doping effects, mobility effects, velocity saturation, short/narrow channel effects, substrate current, thermal/flicker noise, and temperature effects.

• It should be global and compact (preferably without binning), accurate and with as small as possible number of fitting parameters.

• The parameter extraction procedure should be neither complicated nor time-consuming.

• The model has to cover all geometry ranges of interest and ensure good fitting for the device geometries that are not used during parameter extraction. The accurate modeling means not only the correct I-V characteristics, but also the correct current derivatives, i.e. transconductances which are important parameters for the design of analog circuits. In addition, the correct best/worst case modeling must be guaranteed for design robustness.

• The requirement for high speed and high frequency operation also impose an accurate modeling of the intrinsic capacitances. On the other hand for low voltage or small current operation, accurate weak and moderate inversion modeling is obligatory.

• A good model is easily implemented, and does not present convergency problems when used with different simulators.

In the next subsection, the good models available today are presented. Then, the features of models that are appropriate for analog design at the transistor level are discussed.

2.1.1 Overview of MOS models

Spice models [4] - The early Spice models (levels 1, 2, 3) were developed at the University of California, Berkeley to be used with their circuit simulator. All model parameters have physical meaning, but some effects are too simplified or are not modeled at all. These models are not used nowadays, since they are inaccurate for submicron technologies and present discontinuities in current derivatives. However, they are mentioned here because of their historical importance."