Domeika Software Development for Embedded Multi-core Systems

A Practical Guide Using Embedded Intel Architecture
1. Auflage 2011
ISBN: 978-0-08-055858-5
Verlag: Elsevier Science & Techn.
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 440 Seiten, Web PDF

The multicore revolution has reached the deployment stage in embedded systems ranging from small ultramobile devices to large telecommunication servers. The transition from single to multicore processors, motivated by the need to increase performance while conserving power, has placed great responsibility on the shoulders of software engineers. In this new embedded multicore era, the toughest task is the development of code to support more sophisticated systems. This book provides embedded engineers with solid grounding in the skills required to develop software targeting multicore processors. Within the text, the author undertakes an in-depth exploration of performance analysis, and a close-up look at the tools of the trade. Both general multicore design principles and processor-specific optimization techniques are revealed. Detailed coverage of critical issues for multicore employment within embedded systems is provided, including the Threading Development Cycle, with discussions of analysis, design, development, debugging, and performance tuning of threaded applications. Software development techniques engendering optimal mobility and energy efficiency are highlighted through multiple case studies, which provide practical 'how-to” advice on implementing the latest multicore processors. Finally, future trends are discussed, including terascale, speculative multithreading, transactional memory, interconnects, and the software-specific implications of these looming architectural developments.
Table of Contents
Chapter 1 - Introduction
Chapter 2 - Basic System and Processor Architecture
Chapter 3 - Multi-core Processors & Embedded
Chapter 4 -Moving To Multi-core Intel Architecture
Chapter 5 - Scalar Optimization & Usability
Chapter 6 - Parallel Optimization Using Threads
Chapter 7 - Case Study: Data Decomposition
Chapter 8 - Case Study: Functional Decomposition
Chapter 9 - Virtualization & Partitioning
Chapter 10 - Getting Ready For Low Power Intel Architecture
Chapter 11 - Summary, Trends, and Conclusions
Appendix I
Glossary
References
*This is the only book to explain software optimization for embedded multi-core systems
*Helpful tips, tricks and design secrets from an Intel programming expert, with detailed examples using the popular X86 architecture
*Covers hot topics, including ultramobile devices, low-power designs, Pthreads vs. OpenMP, and heterogeneous cores

Autoren/Hrsg.

Domeika, Max

Inhaltsverzeichnis

1;Front Cover;1
2;Software Development for Embedded Multi-core Systems: A Practical Guide Using Embedded Intel® Architecture;4
3;Copyright Page;5
4;Contents;6
5;Preface;10
6;Acknowledgments;14
7;Chapter 1: Introduction;16
7.1;1.1 Motivation;18
7.2;1.2 The Advent of Multi-core Processors;19
7.3;1.3 Multiprocessor Systems Are Not New;19
7.4;1.4 Applications Will Need to be Multi-threaded;21
7.5;1.5 Software Burden or Opportunity;23
7.6;1.6 What is Embedded?;25
7.7;1.7 What is Unique About Embedded?;28
7.8;Chapter Summary;29
8;Chapter 2: Basic System and Processor Architecture;32
8.1;Key Points;32
8.2;2.1 Performance;34
8.3;2.2 Brief History of Embedded Intel® Architecture Processors;35
8.4;2.3 Embedded Trends and Near Term Processor Impact;52
8.5;2.4 Tutorial on x86 Assembly Language;54
8.6;Chapter Summary;68
8.7;Related Reading;69
9;Chapter 3: Multi-core Processors and Embedded;70
9.1;Key Points;70
9.2;3.1 Motivation for Multi-core Processors;71
9.3;3.2 Multi-core Processor Architecture;72
9.4;3.3 Benefits of Multi-core Processors in Embedded;77
9.5;3.4 Embedded Market Segments and Multi-core Processors;78
9.6;3.5 Evaluating Performance of Multi-core Processors;84
9.7;Chapter Summary;102
9.8;Related Reading;103
10;Chapter 4: Moving to Multi-core Intel Architecture;104
10.1;Key Points;104
10.2;4.1 Migrating to Intel Architecture;106
10.3;4.2 Enabling an SMP OS;126
10.4;4.3 Tools for Multi-Core Processor Development;132
10.5;Chapter Summary;151
10.6;Related Reading;152
11;Chapter 5: Scalar Optimization and Usability;154
11.1;Key Points;154
11.2;5.1 Compiler Optimizations;158
11.3;5.2 Optimization Process;168
11.4;5.3 Usability;176
11.5;Chapter Summary;185
11.6;Related Reading;185
12;Chapter 6: Parallel Optimization Using Threads;188
12.1;Key Points;188
12.2;6.1 Parallelism Primer;190
12.3;6.2 Threading Development Cycle;199
12.4;Chapter Summary;221
12.5;Related Reading;222
13;Chapter 7: Case Study: Data Decomposition;224
13.1;Key Points;224
13.2;7.1 A Medical Imaging Data Examiner;224
13.3;Chapter Summary;260
14;Chapter 8: Case Study: Functional Decomposition;262
14.1;Key Points;262
14.2;8.1 Snort;263
14.3;8.2 Analysis;266
14.4;8.3 Design and Implement;273
14.5;8.4 Snort Debug;295
14.6;8.5 Tune;297
14.7;Chapter Summary;301
15;Chapter 9: Virtualization and Partitioning;302
15.1;Key Points;302
15.2;9.1 Overview;302
15.3;9.2 Virtualization and Partitioning;305
15.4;9.3 Techniques and Design Considerations;319
15.5;9.4 Telecom Use Case of Virtualization;337
15.6;Chapter Summary;357
15.7;Related Reading;359
16;Chapter 10: Getting Ready for Low Power Intel Architecture;362
16.1;Key Points;362
16.2;10.1 Architecture;364
16.3;10.2 Debugging Embedded Systems;377
16.4;Chapter Summary;397
17;Chapter 11: Summary, Trends, and Conclusions;400
17.1;11.1 Trends;402
17.2;11.2 Conclusions;407
18;Appendix A;408
19;Glossary;410
19.1;A;410
19.2;B;411
19.3;C;412
19.4;D;413
19.5;E;413
19.6;F;414
19.7;G;414
19.8;H;414
19.9;I;415
19.10;J;416
19.11;K;416
19.12;L;416
19.13;M;416
19.14;N;417
19.15;O;418
19.16;P;418
19.17;R;419
19.18;S;419
19.19;T;420
19.20;V;421
19.21;W;422
19.22;X;422
20;Index;424
20.1;A;424
20.2;B;424
20.3;C;425
20.4;D;425
20.5;E;426
20.6;F;427
20.7;G;427
20.8;H;427
20.9;I;427
20.10;J;428
20.11;K;428
20.12;L;429
20.13;M;429
20.14;N;430
20.15;O;430
20.16;P;431
20.17;Q;432
20.18;R;432
20.19;S;432
20.20;T;433
20.21;U;434
20.22;V;434
20.23;W;434
20.24;X;434
20.25;Z;435