Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications

2006
ISBN: 978-0-387-29217-5
Verlag: Springer US

Buch, Englisch, 411 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 805 g

5. 2 RF Building Blocks. 214 5. 2. 1 Piezoelectric Oscillators. 215 5. 2. 2 Voltage Reference Generator. 220 5. 2. 3 Transmit/Receive Switches. 224 5. 2. 4 Low-Noise Amplifiers (LNAs). 226 5. 2. 5 Power Amplifiers (PAs). 228 5. 2. 6 Mixers and Image-Rejection Receiver. 230 5. 2. 7 Voltage-Controlled Oscillator (VCO). 242 5. 2. 8 Limiting Amplifiers. 248 5. 2. 9 gm-C Filters. 250 5. 3 A/D and D/A Converters. 254 5. 3. 1 Cyclic A/D Converter. 255 5. 3. 2 Sigma-Delta A/D Converter. 264 5. 3. 3 Current-Steering D/A Converter. 270 5. 4 DC-DC Converter. 276 5. 4. 1 Design of DC-DC Converter. 276 5. 4. 2 Switched-Capacitor (SC)-Type Converter. 276 5. 4. 3 Buck Converter. 279 5. 4. 4 Applicable Zones for SC-Type and Buck Converters. 283 5. 4. 5 On-chip Distributed Power Supplies for Ultralow-Power LSIs. 285 5. 5 I/O and ESD-Protection Circuitry for Ultralow-Power LSIs. 291 5. 5. 1 Standard Interface Trends. 291 5. 5. 2 Problems with I/O Circuits for 0. 5-V/3. 3-V Conversion. 292 5. 5. 3 Guidelines for Design of Interface Circuits. 293 5. 5. 4 Performance of I/O Circuits. 297 5. 5. 5 ESD Protection with FD-SOI Devices. 298 5. 5. 6 Design and Layout Requirements for ESD Protection. 300 5. 6 Summary. 303 References. 304 viii 6. SPICE Model for SOI MOSFETs. 307 6. 1 Introduction. 307 6. 2 SPICE Model for SOI MOSFETs. 307 6. 3 Parameter Extraction. 309 6. 4 Example of SOI MOSFET Simulation.

Zielgruppe

Professional and academic readers engaged in designing CMOS LSIs, graduate students and design engineers as well as device and process engineers interested in ultralow-power LSIs

Autoren/Hrsg.

Sakurai, Takayasu

Douseki, Takakuni

Matsuzawa, Akira

Fachgebiete

• Mathematik | Informatik EDV | Informatik Technische Informatik Externe Speicher & Peripheriegeräte
• Geisteswissenschaften Design Produktdesign, Industriedesign
• Mathematik | Informatik EDV | Informatik Technische Informatik Hardware: Grundlagen und Allgemeines
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
• Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
• Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise

Inhaltsverzeichnis

FD-SOI Device and Process Technologies.- Ultralow-Power Circuit Design with FD-SOI Devices.- 0.5-V MTCMOS/SOI Digital Circuits.- 0.5-1V MTCMOS/SOI Analog/RF Circuits.- SPICE Model for SOI MOSFETs.- Applications.- Prospects for FD-SOI Technology.

Über Autor(innen)

Takayasu Sakurai received the Ph.D degree in Electronic Engineering from University of Tokyo, Japan, in 1981 and he joined Toshiba Corporation, where he designed CMOS DRAM, SRAM, BiCMOS ASIC's, RISC's, and multimedia VLSI's. He worked on simple yet accurate interconnect delay, capacitance and MOS models widely used as alpha power-law MOS model. He proposed to sense-amplifying flip-flops, variable threshold voltage CMOS scheme, dual voltage converter scheme, hot carrier resilient circuits and other numerous digital and memory circuits, which are adopted in current high-performance, low-power VLSI's. He was a visiting researcher at University of California, Berkeley from 1988 to 1990. In 1996, he moved to University of Tokyo and is consulting to US startup companies. He has published about 250 technical publications including more than 30 invited papers and 6 books and filed about 100 patents. He is a recipient of four product awards and two design contest awards. He served as a conference chair for the Symposium on VLSI Circuits, and a technical program committee member for ISSCC, CICC, DAC, ICCAD, FPGA workshop, ISLPED, ASPDAC, TAU, and other international conferences. He is a keynote speaker for the 2003 ISSCC. He is an IEEE Fellow, an elected Administration Committee member for the IEEE Solid-State Circuits Society and an IEEE CAS distinguished lecturer.