Bhuvaneswari | Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems | Buch | 978-81-322-3539-2 | sack.de

Buch, Englisch, 174 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 2934 g

Bhuvaneswari

Application of Evolutionary Algorithms for Multi-objective Optimization in VLSI and Embedded Systems


Softcover Nachdruck of the original 1. Auflage 2015
ISBN: 978-81-322-3539-2
Verlag: Springer India

Buch, Englisch, 174 Seiten, Previously published in hardcover, Format (B × H): 155 mm x 235 mm, Gewicht: 2934 g

ISBN: 978-81-322-3539-2
Verlag: Springer India


This book describes how evolutionary algorithms (EA), including genetic algorithms (GA) and particle swarm optimization (PSO) can be utilized for solving multi-objective optimization problems in the area of embedded and VLSI system design. Many complex engineering optimization problems can be modelled as multi-objective formulations. This book provides an introduction to multi-objective optimization using meta-heuristic algorithms, GA and PSO and how they can be applied to problems like hardware/software partitioning in embedded systems, circuit partitioning in VLSI, design of operational amplifiers in analog VLSI, design space exploration in high-level synthesis, delay fault testing in VLSI testing and scheduling in heterogeneous distributed systems. It is shown how, in each case, the various aspects of the EA, namely its representation and operators like crossover, mutation, etc, can be separately formulated to solve these problems. This book is intended for design engineers and researchers in the field of VLSI and embedded system design. The book introduces the multi-objective GA and PSO in a simple and easily understandable way that will appeal to introductory readers.

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Weitere Infos & Material


Introduction to Multi-Objective Evolutionary Algorithms.- Hardware/Software Partitioning for Embedded Systems.- Circuit Partitioning for VLSI Layout.- Design of Operational Amplifier.- Design Space Exploration for Scheduling and Allocation in High Level Synthesis of Datapaths.- Design Space Exploration of Datapath (Architecture) in High Level Synthesis for Computation Intensive Applications.- Design Flow from Algorithm to RTL using Evolutionary Exploration Approach.- Crosstalk Delay Fault Test Generation.- Scheduling in Heterogeneous Distributed Systems.


M.C. Bhuvaneswari is Associate Professor in Department of Electrical and Electronics Engineering at PSG College of Technology, Coimbatore, India. She completed her PhD in VLSI Design and Testing from Bharathiar University in 2002. She has over 20 years of research and teaching experience. Her areas of research interest include VLSI design and testing, genetic algorithms, digital signal processing, digital systems design and microprocessors. She has published her work in several journals and conferences of national and international repute. Dr. Bhuvaneswari is a Life Member of Indian Society for Technical Education, Institution of Engineers (India), Computer Society of India and System Society of India. She was honoured with the Dakshinamoorthy Award for Teaching Excellence in the year 2010.



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