Formal verification has become one of the most important steps  in circuit design. Since circuits can contain several million  transistors, verification of such large designs becomes more and more  difficult. Pure simulation cannot guarantee the correct behavior and  exhaustive simulation is often impossible. However, many designs, like  ALUs, have very regular structures that can be easily described at a  higher level of abstraction. For example, describing (and verifying)  an integer multiplier at the bit-level is very difficult, while the  verification becomes easy when the outputs are grouped to build a  bit-string. Recently, several approaches for formal circuit  verification have been proposed that make use of these regularities.  These approaches are based on Word-Level Decision Diagrams (WLDDs)  which are graph-based representations of functions (similar to BDDs)  that allow for the representation of functions with a Boolean range  and an integer domain. 
                Formal Verification of Circuits
                 is devoted to the discussion of  recent developments in the field of decision diagram-based formal  verification. Firstly, different types of decision diagrams (including  WLDDs) are introduced and theoretical properties are discussed that  give further insight into the data structure. Secondly, implementation  and minimization concepts are presented. Applications to arithmetic  circuit verification and verification of designs specified by hardware  description languages are described to show how WLDDs work in  practice. 
                Formal Verification of Circuits
                 is intended for CAD developers  and researchers as well as designers using modern verification tools.  It will help people working with formal verification (in industry or  academia) to keep informed about recent developments in this area.
        
    
    
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1 Introduction.- 2 Notations and Definitions.- 3 Decision Diagrams.- 4 Theoretical Aspects of WLDDs.- 5 Implementation of WLDDs.- 6 Minimization of DDs.- 7 Arithmetic Circuits.- 8 Verification of Hdls.- 9 Conclusions.- References.