Buch, Englisch, 263 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 423 g
7th International Haifa Verification Conference, HVC 2011, Haifa, Israel, December 6-8, 2011, Revised Selected Papers
Buch, Englisch, 263 Seiten, Format (B × H): 155 mm x 235 mm, Gewicht: 423 g
Reihe: Programming and Software Engineering
ISBN: 978-3-642-34187-8
Verlag: Springer
The 15 revised full papers presented together with 3 tool papers and 4 posters were carefully reviewed and selected from 43 submissions. The papers are organized in topical sections on synthesis, formal verification, software quality, testing and coverage, experience and tools, and posters- student event.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
Weitere Infos & Material
Preprocessing and Inprocessing Techniques in SAT.- Pioneering the Future of Verification: A Spiral of Technological and Business Innovation.- Automated Detection and Repair of Concurrency Bugs.- Verification Challenges of Workload Optimized Hardware Systems.- Synthesis with Clairvoyance.- Generalized Reactivity(1) Synthesis without a Monolithic Strategy.- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear Hybrid Automata.- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications.- Liveness vs Safety – A Practical Viewpoint.- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search.- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs.- Concurrent Small Progress Measures.- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns.- Interpolation-Based Function Summaries in Bounded Model Checking.- Can File Level Characteristics Help Identify System Level Fault-Proneness.- Reverse Coverage Analysis.- Symbolic Testing of OpenCL Code.- Dynamic Test Data Generation for Data Intensive Applications.- Injecting Floating-Point Testing Knowledge into Test Generators.- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE.- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware.- On-Line Detection and Prediction of Temporal Patterns.- Function Summaries in Software Upgrade Checking.- The Rabin Index of Parity Games.- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing.
.- ioneering the Future of Verification: A Spiral of Technological and Business Innovation.- Automated Detection and Repair of Concurrency Bugs.- Verification Challenges of Workload Optimized Hardware Systems.- Synthesis with Clairvoyance.- Generalized Reactivity(1) Synthesis without a Monolithic Strategy.- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear HybridAutomata.- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications.- Liveness vs Safety – A Practical Viewpoint.- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search.- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs.- Concurrent Small Progress Measures.- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns.- Interpolation-Based Function Summaries in Bounded Model Checking.- Can File Level Characteristics Help Identify System Level Fault-Proneness.- Reverse Coverage Analysis.- Symbolic Testing of OpenCL Code.- Dynamic Test Data Generation for Data Intensive Applications.- Injecting Floating-Point Testing Knowledge into Test Generators.- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE.- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware.- On-Line Detection and Prediction of Temporal Patterns.- Function Summaries in Software Upgrade Checking.- The Rabin Index of Parity Games.- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing.