El-Kareh / Hutter Silicon Analog Components

Device Design, Process Integration, Characterization, and Reliability
1. Auflage 2015
ISBN: 978-1-4939-2751-7
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 634 Seiten

This book covers modern analog components, their characteristics, and interactions with process parameters. It serves as a comprehensive guide, addressing both the theoretical and practical aspects of modern silicon devices and the relationship between their electrical properties and processing conditions. Based on the authors' extensive experience in the development of analog devices, this book is intended for engineers and scientists in semiconductor research, development and manufacturing. The problems at the end of each chapter and the numerous charts, figures and tables also make it appropriate for use as a text in graduate and advanced undergraduate courses in electrical engineering and materials science.

Dr. Badih El-Kareh is an independent consultant, retired IBM and Texas Instruments physicist. He has over 40 years' experience in semiconductor device design, process integration, and characterization. This includes the development of advanced CMOS and BiCMOS processes and devices for analog, memory, digital, and high-voltage applications. He has 30 years' experience in academic and industrial teaching and is author of a book on VLSI Silicon Devices, a book on Modern Semiconductor Processing Technologies, and a book on Silicon Devices and Process Integration. He authored and co-authored 35 papers and has 49 US patents issued. Dr. El-Kareh is a senior member of the IEEE.Lou Hutter has almost 35 years of experience in the semiconductor industry.  As Director of the Mixed-Signal Technology Development group at TI, he was responsible for all analog, mixed-signal, RF, and power technology development in the company, supporting every major business unit.  After retiring from TI in 2007, he became the General Manager of the Analog Foundry business unit at Dongbu HiTek, a S. Korean foundry, where he was a Senior VP.  He was elected a TI Fellow in 1995, holds 47 U.S. patents, and has co-authored over 30 papers.  His focus areas have been in high-performance analog CMOS, high-power BCD technology, power metallization, SiGe BiCMOS, technology road-mapping, and technology development methodology.

Autoren/Hrsg.

El-Kareh, Badih

Hutter, Lou N.

Inhaltsverzeichnis

1;Foreword;6
2;Preface;8
3;Acknowledgments;10
4;Contents;11
5;Abbreviations and Acronyms;18
6;Symbols;23
7;1 The World Is Analog;38
7.1;Abstract;38
7.2;1.1 Introduction;38
7.3;1.2 What's Different About Analog;40
7.3.1;1.2.1 Digital Design Considerations;40
7.3.2;1.2.2 Analog Design Considerations;42
7.3.3;1.2.3 Analog Technology and Manufacturing Considerations;45
7.3.3.1;1.2.3.1 Role of Bipolar Transistors in Analog Technology;49
7.4;1.3 Integration or Not;49
7.5;1.4 Analog Process Technologies;51
7.5.1;1.4.1 Mixed-Signal CMOS Technology;51
7.5.2;1.4.2 RF CMOS Technology;53
7.5.3;1.4.3 High-Speed BiCMOS;53
7.5.4;1.4.4 Analog CMOS Technology;54
7.5.4.1;1.4.4.1 Bipolar-CMOS-DMOS (BCD) Technology;56
7.5.5;1.4.5 Nonvolatile Memory;57
7.6;1.5 Analog Technology Roadmaps;58
7.7;References;59
8;2 Review of Single-Crystal Silicon Properties;62
8.1;Abstract;62
8.2;2.1 Introduction;62
8.3;2.2 Crystal Structure;62
8.4;2.3 Energy-Gap and Intrinsic Carrier Concentration;64
8.4.1;2.3.1 Energy Band Model;65
8.4.2;2.3.2 The Boltzmann Distribution;67
8.4.3;2.3.3 Fermi--Dirac Distribution and Density of States;68
8.5;2.4 Doping;71
8.5.1;2.4.1 Dopants from the Fifth Column---Donors;71
8.5.2;2.4.2 Dopants from the Third Column---Acceptors;72
8.5.3;2.4.3 Band Model for Impurities in Silicon;74
8.6;2.5 Carrier Transport;77
8.6.1;2.5.1 Carrier Transport by Drift---Low Field;78
8.6.2;2.5.2 Carrier Transport by Drift---High Field;85
8.6.3;2.5.3 Carrier Transport by Diffusion;87
8.6.4;2.5.4 Total Drift and Diffusion Current Density;88
8.6.5;2.5.5 Non-uniform Doping Concentration;89
8.6.6;2.5.6 Einstein Relation;90
8.7;2.6 Non-equilibrium Conditions;91
8.7.1;2.6.1 Carrier Lifetime;91
8.8;Problems;98
8.9;References;99
9;3 PN Junctions;101
9.1;Abstract;101
9.2;3.1 Introduction;101
9.3;3.2 Structure and Types;101
9.3.1;3.2.1 Cylindrical and Spherical Approximations;105
9.4;3.3 Junction Characteristics at Thermal Equilibrium;105
9.4.1;3.3.1 Step Junction;106
9.5;3.4 Forward-Biased Junction;117
9.5.1;3.4.1 Effect of Series Resistances;121
9.5.2;3.4.2 Effect of Surface Recombination;122
9.6;3.5 Reverse-Biased Junction;124
9.6.1;3.5.1 Reverse Leakage Current;126
9.6.2;3.5.2 Impact Ionization and Avalanche Breakdown;129
9.6.3;3.5.3 Reverse Recovery Time;132
9.7;3.6 Applications;135
9.7.1;3.6.1 Zener Diode;135
9.7.2;3.6.2 PIN Diode;139
9.8;Problems;141
9.9;References;144
10;4 Rectifying and Ohmic Contacts;146
10.1;Abstract;146
10.2;4.1 Introduction;146
10.3;4.2 Rectifying Contacts, Schottky Barrier Diode;147
10.3.1;4.2.1 Metal--Semiconductor Barriers;147
10.3.2;4.2.2 Current--Voltage Characteristics;152
10.3.3;4.2.3 Schottky Barrier Diode Applications;166
10.4;4.3 Ohmic Contacts;169
10.4.1;4.3.1 Specific Contact Resistivity;170
10.5;Problems;177
10.6;References;179
11;5 Bipolar and Junction Field-Effect Transistors;182
11.1;Abstract;182
11.2;5.1 Introduction;182
11.3;5.2 Bipolar Junction Transistor, BJT;184
11.3.1;5.2.1 Idealized Structure;184
11.3.2;5.2.2 NPN Transistor in a CMOS Technology;192
11.3.3;5.2.3 PNP Transistors in CMOS Technology;215
11.3.4;5.2.4 Frequency Response;217
11.3.5;5.2.5 BJT Applications;220
11.4;5.3 Junction Field-Effect Transistor, JFET;222
11.4.1;5.3.1 Idealized Normally On NJFET;222
11.4.2;5.3.2 JFET in a CMOS Technology;231
11.4.3;5.3.3 JFET Applications;233
11.5;Problems;234
11.6;References;238
12;6 Analog/RF CMOS;240
12.1;Abstract;240
12.2;6.1 Introduction;240
12.3;6.2 Review of MOS Properties;241
12.3.1;6.2.1 Flatband Condition;241
12.3.2;6.2.2 Accumulation and Depletion;246
12.3.3;6.2.3 Weak and Strong Inversion;247
12.3.4;6.2.4 MOS C-V Technique;252
12.4;6.3 CMOS;256
12.4.1;6.3.1 Review of MOSFETs, Long and Wide Channel;257
12.4.2;6.3.2 Analog Specific MOSFETs;279
12.4.3;6.3.3 Small-Size Effects;286
12.5;6.4 Analog Application;298
12.5.1;6.4.1 Differential Amplifier;299
12.5.2;6.4.2 Current Mirror;299
12.5.3;6.4.3 Native NMOS;300
12.5.4;6.4.4 Buried Channel MOSFET;301
12.5.5;6.4.5 Depletion-Mode MOSFET;301
12.6;Problems;302
12.7;References;304
13;7 High-Voltage and Power Transistors;310
13.1;Abstract;310
13.2;7.1 Introduction;310
13.3;7.2 The Drift Region;312
13.4;7.3 On-State Analysis;312
13.4.1;7.3.1 On-Resistance, RDS(on);313
13.4.2;7.3.2 Specific On-Resistance, RSP;314
13.5;7.4 Off-State Analysis;317
13.5.1;7.4.1 A Simple One-Dimensional Analysis of BVDSS;318
13.5.2;7.4.2 Reduced Surface Field, RESURF;321
13.6;7.5 Trade-Offs;327
13.6.1;7.5.1 Trade-Off Between RSP and BVDSS;328
13.6.2;7.5.2 Switching Performance, RDS(on) x QG;329
13.7;7.6 Design and Characteristics of DEMOS;333
13.7.1;7.6.1 Complementary DEMOS;333
13.7.2;7.6.2 Field-Gap DENMOS;334
13.7.3;7.6.3 Subthreshold Leakage Current;335
13.7.4;7.6.4 Asymmetric and Symmetric DEMOS;335
13.7.5;7.6.5 Dielectric RESURF;336
13.7.6;7.6.6 Key Dimensions;337
13.7.7;7.6.7 Specific on-Resistance Versus Breakdown Voltage;338
13.8;7.7 Design and Characteristics of LDMOS;338
13.8.1;7.7.1 NLDMOS Configurations;339
13.8.2;7.7.2 PLDMOS;341
13.8.3;7.7.3 Laterally Graded Channel Effects;341
13.8.4;7.7.4 The Superjunction Concept;343
13.8.5;7.7.5 Key Dimensions;345
13.8.6;7.7.6 SOI Devices;347
13.8.7;7.7.7 Trade-Off Between RSP and BVDSS;349
13.9;7.8 High-Voltage and High-Current Effects;350
13.9.1;7.8.1 Quasi-Saturation;350
13.9.2;7.8.2 Impact Ionization and Body Current;360
13.9.3;7.8.3 On-State Breakdown Voltage;362
13.9.4;7.8.4 Self-heating and Temperature Effects;363
13.10;7.9 Safe Operating Area (SOA);368
13.10.1;7.9.1 Electrical SOA;369
13.10.2;7.9.2 Electrothermal SOA;370
13.11;7.10 Circuit Applications;371
13.11.1;7.10.1 Half H-Bridge Circuit;371
13.11.2;7.10.2 H-Bridge Motor Driver---LDMOS Reverse Recovery;373
13.11.3;7.10.3 DC--DC Converter---Switching Effects;376
13.11.4;7.10.4 AC--DC Converter;379
13.12;Problems;381
13.13;References;384
14;8 Passive Components;392
14.1;Abstract;392
14.2;8.1 Introduction;392
14.3;8.2 Resistors;392
14.3.1;8.2.1 Definition of Terms;394
14.3.2;8.2.2 Polysilicon Resistor;399
14.3.3;8.2.3 Silicon Resistors;410
14.3.4;8.2.4 Thin-Film Resistors, TFR;412
14.4;8.3 Capacitors;413
14.4.1;8.3.1 Definition of Terms;414
14.4.2;8.3.2 MOS Capacitors;419
14.4.3;8.3.3 Poly--Insulator--Poly Capacitor, PIP;421
14.4.4;8.3.4 Metal--Insulator--Metal Capacitors;421
14.5;8.4 Varactors;424
14.5.1;8.4.1 Definition of Terms;424
14.5.2;8.4.2 Junction Varactors;425
14.5.3;8.4.3 MOS Varactors;428
14.6;8.5 Planar Spiral Inductors;432
14.6.1;8.5.1 Definition of Terms;432
14.7;8.6 Applications;434
14.7.1;8.6.1 Resistors;434
14.7.2;8.6.2 Capacitors;435
14.7.3;8.6.3 Inductors and Varactors;437
14.8;Problems;437
14.9;References;439
15;9 Process Integration;445
15.1;Abstract;445
15.2;9.1 Introduction;445
15.3;9.2 Analog, Mixed-Signal, and RF Components;448
15.4;9.3 Unit Processes;448
15.5;9.4 Digital CMOS;450
15.5.1;9.4.1 Isolation Module;451
15.5.2;9.4.2 Wells;453
15.5.3;9.4.3 Gate Stack Module;453
15.5.4;9.4.4 Source--Drain Module;454
15.5.5;9.4.5 BEOL Modules;455
15.6;9.5 MS and RF CMOS;461
15.6.1;9.5.1 High-Voltage CMOS;462
15.6.2;9.5.2 Low-Voltage Analog CMOS;462
15.6.3;9.5.3 Isolated NMOS;463
15.6.4;9.5.4 Drain-Extended CMOS;464
15.6.5;9.5.5 Bipolar Junction Transistors;465
15.6.6;9.5.6 Polysilicon and Silicon Resistors;466
15.6.7;9.5.7 Lateral Flux Capacitor, LFC;467
15.6.8;9.5.8 Vertical MIM Capacitor in Aluminum BEOL;468
15.6.9;9.5.9 Vertical MIM Capacitor in Copper BEOL;469
15.6.10;9.5.10 Inductor;471
15.7;9.6 Analog CMOS;471
15.7.1;9.6.1 HV Analog CMOS Transistors;471
15.7.2;9.6.2 Native NMOS;472
15.7.3;9.6.3 Depletion-Mode NMOS;472
15.7.4;9.6.4 Buried Channel PMOS;473
15.7.5;9.6.5 Junction Field-Effect Transistor;474
15.7.6;9.6.6 High Sheet Poly Resistor;474
15.7.7;9.6.7 Thin-Film Resistor;476
15.7.8;9.6.8 Poly--Insulator--Poly Capacitor;477
15.7.9;9.6.9 Buried (Subsurface) Zener Diode;479
15.8;9.7 Bipolar-CMOS-DMOS, BCD;479
15.8.1;9.7.1 NLDMOS;480
15.8.2;9.7.2 High-Frequency NLDMOS;482
15.8.3;9.7.3 Low-Complexity NLDMOS;483
15.8.4;9.7.4 Isolated-Drain NLDMOS;485
15.8.5;9.7.5 PLDMOS;485
15.9;Problems;486
15.10;References;488
16;10 Mismatch and Noise;491
16.1;Abstract;491
16.2;10.1 Introduction;491
16.3;10.2 Mismatch;491
16.3.1;10.2.1 Layout Configurations [3];493
16.3.2;10.2.2 Inverse Area Law;495
16.3.3;10.2.3 MOSFET Mismatch;496
16.3.4;10.2.4 Bipolar Transistor Mismatch;503
16.3.5;10.2.5 Resistor Mismatch;505
16.3.6;10.2.6 Capacitor Mismatch;506
16.4;10.3 Noise;509
16.4.1;10.3.1 Classification of Noise;510
16.4.2;10.3.2 1/f Noise in CMOS;515
16.4.3;10.3.3 1/f Noise in Resistors;520
16.4.4;10.3.4 1/f Noise in Bipolar Junction Transistors, BJT;522
16.4.5;10.3.5 1/f Noise in Junction Field-Effect Transistors, JFET;523
16.5;10.4 Circuit Examples;524
16.5.1;10.4.1 Mismatch in Current Mirrors;524
16.5.2;10.4.2 Noise in Two-Stage Transconductance Amplifier;525
16.6;Problems;527
16.7;References;529
17;11 Chip Reliability;536
17.1;Abstract;536
17.2;11.1 Introduction;536
17.3;11.2 Definition of Terms and Basic Reliability Concepts;537
17.4;11.3 Reliability Models;542
17.4.1;11.3.1 Exponential Distribution;543
17.4.2;11.3.2 Normal Distribution;544
17.4.3;11.3.3 Lognormal Distribution;546
17.4.4;11.3.4 Weibull Distribution;549
17.4.5;11.3.5 Power Law Model;552
17.5;11.4 Failure Mechanisms;553
17.5.1;11.4.1 Dielectric Reliability;553
17.5.2;11.4.2 Electromigration and Stress Migration;565
17.5.3;11.4.3 Hot-Carrier Effects;574
17.5.4;11.4.4 Bias Temperature Instability;582
17.5.5;11.4.5 Joule Heating and Resistor Reliability;584
17.5.6;11.4.6 Plasma Charging and Damage;586
17.5.7;11.4.7 Latch-up;590
17.5.8;11.4.8 High-Voltage MOSFET Reliability;596
17.5.9;11.4.9 Electrostatic Discharge and Voltage Snapback;599
17.6;Problems;602
17.7;References;603
18;Appendix A Universal Physical Constants;615
19;Appendix B Properties of Silicon and GermaniumCrystals (300 K);616
20;Appendix C Properties of SiO2 and Si3N4 (300 K);619
21;Appendix D International System of Units;620
22;Appendix E The Greek Alphabet;621
23;Appendix F Conversion Factors;622
24;Index;624