Jespers The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits

The semi-empirical and compact model approaches
1. Auflage 2009
ISBN: 978-0-387-47101-3
Verlag: Springer-Verlag
Format: PDF
Kopierschutz: Adobe DRM (»Systemvoraussetzungen)

E-Book, Englisch, 171 Seiten

In "The g/I Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits", we compare the semi-empirical to the compact model approach. Small numbers of parameters make the compact model attractive for the model paves the way towards analytic expressions unaffordable otherwise. The E.K.V model is a good candidate, but when it comes to short channel devices, compact models are either inaccurate or loose straightforwardness. Because sizing requires basically a reliable large signal representation of MOS transistors, we investigate the potential of the E.K.V model when its parameters are supposed to be bias dependent. The model-driven and semi-empirical methods are compared considering the Intrinsic Gain Stage and a few more complex circuits. A series of MATLAB files found on extras-springer.com  allow redoing the tests.

Autoren/Hrsg.

Jespers, Paul

Inhaltsverzeichnis

1;Foreword;7
2;Contents;10
3;Notations;14
4;Sizing the Intrinsic Gain Stage;16
4.1;1.1 The Intrinsic Gain Stage;16
4.2;1.2 The Intrinsic Gain Stage Frequency Response;16
4.3;1.3 Sizing the Intrinsic Gain Stage;18
4.4;1.4 The gm/ ID Sizing Methodology;22
4.5;1.5 Conclusions;23
5;The Charge Sheet Model Revisited;25
5.1;2.1 Why the Charge Sheet Model?;25
5.2;2.2 The Generic Drain Current Equation;25
5.3;2.3 The Charge Sheet Model Drain Current Equation;27
5.4;2.4 Common Source Characteristics;29
5.5;2.5 Weak Inversion Approximation of the Charge Sheet Model;32
5.6;2.6 The gm/ ID Ratio in the Common Source Configuration;34
5.7;2.7 Common Gate Characteristics of the Saturated Transistor;37
5.8;2.8 A Few Concluding Remarks Concerning the C.S.M.;38
6;Graphical Interpretation of the Charge Sheet Model;39
6.1;3.1 A Graphical Representation of ID;39
6.2;3.2 More on the VT Curve;42
6.3;3.3 Two Approximate Representations of VT;43
6.4;3.4 A Few Examples Illustrating the Use of the Graphical Construction;46
6.5;3.5 A Closer Look to the Pinch-Off Region;52
6.6;3.6 Conclusion;53
7;Compact Modeling;54
7.1;4.1 The Basic Compact Model;54
7.2;4.2 The E.K.V. Model;55
7.3;4.3 The Common Source Characteristics ID (VG);61
7.4;4.4 Strong andWeak Inversion Asymptotic Approximations Derived from the Compact Model;63
7.5;4.5 Checking the Compact Model Against the C.S.M.;63
7.6;4.6 Evaluation of gm/ ID;67
7.7;4.7 Sizing the Intrinsic Gain Stage by Means of the E. K. V. Model;68
7.8;4.8 The Common-Gate gms/ ID Ratio;70
7.9;4.9 An Earlier Compact Model;71
7.10;4.10 Modeling Mobility Degradation;72
7.11;4.11 Conclusion;79
8;The Real Transistor;80
8.1;5.1 Short Channel Effects;80
8.2;5.2 Checking the Validity of the Compact Model when its Parameters vary with the Source and Drain Voltages;82
8.3;5.3 Compact Model Parameters Versus Bias and Gate Length;89
8.4;5.4 Reconstructing ID (VDS) Characteristic;95
8.5;5.5 Evaluation of gx/ ID Ratios;97
8.6;5.6 Conclusions;104
9;The Real Intrinsic Gain Stage;105
9.1;6.1 The Dependence on Bias Conditions of the gm/ ID and gd/ ID Ratios ( MATLAB fig061. m);105
9.2;6.2 Sizing the I.G.S with "Semi-empirical" Data;106
9.3;6.3 Model Driven Sizing of the I.G.S.;116
9.4;6.4 Slew-Rate Considerations;123
9.5;6.5 Conclusions;124
10;The Common-Gate Configuration;125
10.1;7.1 Drain Current Versus Source-to-Substrate Voltage ( Matlab fig071. m);125
10.2;7.2 The Cascoded Intrinsic Gain Stage;127
11;Sizing the Miller Op. Amp.;132
11.1;8.1 Introductory Considerations;132
11.2;8.2 The Miller Op. Amp.;132
11.3;8.3 Sizing the Miller Operational Amplifier (MATLAB OpAmp. m);140
11.4;8.4 Conclusion;153
12;How to Utilize the Data available under "extras. springer. com";154
12.1;A1.1 Global Variables;154
12.2;A1.2 An Example Making Use of the "Semi-empirical" Data: The Evaluation of Drain Currents and gm/ ID Ratio Matrices ( MATLAB A12. m);155
12.3;A1.3 An Example Making Use of the E.K.V Global Variables: The Elaboration of an ID( VGS) Characteristic ( Matlab A13. m);157
13;The "MATLAB" Toolbox;160
13.1;A2.1 Charge Sheet Model Files;160
13.2;A2.2 Compact Model Files;162
13.3;A2.3 Other Functions;163
14;Temperature and Mismatch, from C.S.M. to E. K. V.;165
14.1;A3.1 The Influence of the Temperature on the Drain Current ( MATLAB A31. m);165
14.2;A3.2 The Influence of the Temperature on gm/ID ( Matlab A32. m);166
14.3;A3.3 Temperature Dependence of E.K.V Parameters ( MATLAB A33. m);168
14.4;A3.4 The Impact of Technological Mismatches on the Drain Current ( Matlab A34. m);169
14.5;A3.5 Mismatch and E.K.V Parameters (MATLAB A35.m);171
15;E.K.V. Intrinsic Capacitance Model;172
16;Bibliography;176
17;Index;178