Finite State Machine Logic Synthesis for Complex Programmable Logic Devices

2013
ISBN: 978-3-642-36165-4
Verlag: Springer

Buch, Englisch, Band 231, 172 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 4085 g

Reihe: Lecture Notes in Electrical Engineering

This book is a monograph devoted to logic synthesis and optimization for CPLDs. CPLDs' macrocell can also be interpreted as programmable AND-fixed OR structure, well known as PAL-based structure. The question is: what should be done when the number of implicants representing function exceeds the number of product terms available in a logic block. The answer is ... in the book.

Logic synthesis and optimization methods dedicated for PAL-based structures are proposed. The methods strive to find the optimum fit for the combinational logic and finite state machines to the structure of the logic device and aim at area and speed optimization. The theoretical background and complete strategies are richly illustrated with examples and figures.

Zielgruppe

Research

Autoren/Hrsg.

Kania, Dariusz

Czerwinski, Robert

Fachgebiete

• Mathematik | Informatik EDV | Informatik Informatik Logik, formale Sprachen, Automaten

Inhaltsverzeichnis

Introduction.- Definitions and Basic Properties.- Synthesis of FSMs.- State Assignment Algorithms.- Theoretical Background of Technology-Dependent Optimization.- The Algorithm of Area Optimization Based on Graphs of Outputs.- Conclusions.- Output File Format.- Conclusion.