Buch, Englisch, 255 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 600 g
Buch, Englisch, 255 Seiten, Format (B × H): 160 mm x 241 mm, Gewicht: 600 g
Reihe: Integrated Circuits and Systems
ISBN: 978-1-4020-5187-6
Verlag: Springer Netherlands
Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design’s manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
Zielgruppe
Research
Autoren/Hrsg.
Fachgebiete
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Bauelemente, Schaltkreise
- Technische Wissenschaften Elektronik | Nachrichtentechnik Elektronik Mikroprozessoren
- Geisteswissenschaften Design Produktdesign, Industriedesign
- Mathematik | Informatik EDV | Informatik Professionelle Anwendung Computer-Aided Design (CAD)
- Technische Wissenschaften Technik Allgemein Konstruktionslehre und -technik
- Mathematik | Informatik EDV | Informatik Angewandte Informatik Computeranwendungen in Wissenschaft & Technologie
- Technische Wissenschaften Technik Allgemein Computeranwendungen in der Technik
Weitere Infos & Material
Random Defects.- Systematic Yield - Lithography.- Systematic Yield - Chemical Mechanical Polishing (CMP).- Variability & Parametric Yield.- Design for Yield.- Yield Prediction.- Conclusions.
