Orshansky / Nassif / Boning Design for Manufacturability and Statistical Design

A Constructive Approach
1. Auflage 2007
ISBN: 978-0-387-69011-7
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 316 Seiten

Reihe: Integrated Circuits and Systems

Design for Manufacturability and Statistical Design: A Comprehensive Approach presents a comprehensive overview of methods that need to be mastered in understanding state-of-the-art design for manufacturability and statistical design methodologies. Broadly, design for manufacturability is a set of techniques that attempt to fix the systematic sources of variability, such as those due to photolithography and CMP. Statistical design, on the other hand, deals with the random sources of variability. Both paradigms operate within a common framework, and their joint comprehensive treatment is one of the objectives of this book and an important differentation.

Autoren/Hrsg.

Orshansky, Michael

Nassif, Sani

Boning, Duane

Inhaltsverzeichnis

1;Contents;10
2;1 INTRODUCTION;14
2.1;1.1 RISE OF LAYOUT CONTEXT DEPENDENCE;15
2.2;1.2 VARIABILITY AND UNCERTAINTY;16
2.3;1.3 CHARACTERIZATION VS. MODELING;18
2.4;1.4 MODEL TO HARDWARE MATCHING;19
2.5;1.5 DESIGN FOR MANUFACTURABILITY VS. STATISTICAL DESIGN;19
3;Part I Sources of Variability;22
3.1;2 FRONT END VARIABILITY;23
3.1.1;2.1 INTRODUCTION;23
3.1.2;2.2 VARIABILITY OF GATE LENGTH;27
3.1.3;2.3 GATE WIDTH VARIABILITY;38
3.1.4;2.4 THRESHOLD VOLTAGE VARIABILITY;39
3.1.5;2.5 THIN FILM THICKNESS;44
3.1.6;2.6 LATTICE STRESS;47
3.1.7;2.7 VARIABILITY IN EMERGING DEVICES;49
3.1.8;2.8 PHYSICAL VARIATIONS DUE TO AGING AND WEAROUT;51
3.1.9;2.9 SUMMARY;53
3.2;3 BACK END VARIABILITY;54
3.2.1;3.1 INTRODUCTION;54
3.2.2;3.2 COPPER CMP;55
3.2.3;3.3 COPPER ELECTROPLATING;59
3.2.4;3.4 MULTILEVEL COPPER INTERCONNECT VARIATION;61
3.2.5;3.5 INTERCONNECT LITHOGRAPHY AND ETCH VARIATION;63
3.2.6;3.6 DIELECTRIC VARIATION;65
3.2.7;3.7 BARRIER METAL DEPOSITION;65
3.2.8;3.8 COPPER AND VIA RESISTIVITY;66
3.2.9;3.9 COPPER LINE EDGE ROUGHNESS;67
3.2.10;3.10 CARBON NANOTUBE INTERCONNECTS;68
3.2.11;3.11 SUMMARY;68
3.3;4 ENVIRONMENTAL VARIABILITY;69
3.3.1;4.1 INTRODUCTION;69
3.3.2;4.2 IMPACT OF ENVIRONMENTAL VARIABILITY;70
3.3.3;4.3 ANALYSIS OF VOLTAGE VARIABILITY;76
3.3.4;Current;79
3.3.5;4.4 SYSTEMATIC ANALYSIS OF TEMPERATURE VARIABILITY;84
3.3.6;4.5 OTHER SOURCES OF VARIABILITY;92
3.3.7;4.6 SUMMARY;92
4;Part II Variability Characterization and Analysis;93
4.1;5 TEST STRUCTURES FOR VARIABILITY;94
4.1.1;5.1 TEST STRUCTURES: CLASSIFICATION AND FIGURES OF MERIT;94
4.1.2;5.2 CHARACTERIZATION USING SHORT LOOP FLOWS;96
4.1.3;5.3 TRANSISTOR TEST STRUCTURES;101
4.1.4;5.4 DIGITAL TEST STRUCTURES;103
4.1.5;5.5 SUMMARY;107
4.2;6 STATISTICAL FOUNDATIONS OF DATA ANALYSIS AND MODELING;109
4.2.1;6.1 A BRIEF PROBABILITY PRIMER;110
4.2.2;6.2 EMPIRICAL MOMENT ESTIMATION;112
4.2.3;6.3 ANALYSIS OF VARIANCE AND ADDITIVE MODELS;114
4.2.4;6.4 CASE STUDIES: ANOVA FOR GATE LENGTH VARIABILITY;117
4.2.5;6.5 DECOMPOSITION OF VARIANCE INTO SPATIAL SIGNATURES;121
4.2.6;6.6 SPATIAL STATISTICS: DATA ANALYSIS AND MODELING;126
4.2.7;6.7 SUMMARY;130
5;Part III Design Techniques for Systematic Manufacturability Problems;132
5.1;7 LITHOGRAPHY ENHANCEMENT TECHNIQUES;133
5.1.1;7.1 FUNDAMENTALS OF LITHOGRAPHY;134
5.1.2;7.2 PROCESS WINDOW ANALYSIS;140
5.1.3;7.3 OPTICAL PROXIMITY CORRECTION AND SRAFS;143
5.1.4;7.4 SUBRESOLUTION ASSIST FEATURES;146
5.1.5;7.5 PHASE SHIFT MASKING;149
5.1.6;7.6 NON-CONVENTIONAL ILLUMINATION AND IMPACT ON DESIGN;155
5.1.7;7.7 NOMINAL AND ACROSS PROCESS WINDOW HOT SPOT ANALYSIS;156
5.1.8;7.8 TIMING ANALYSIS UNDER SYSTEMATIC VARIABILITY;158
5.1.9;7.9 SUMMARY;160
5.2;8 ENSURING INTERCONNECT PLANARITY;161
5.2.1;8.1 OVERVIEW OF DUMMY FILL;163
5.2.2;8.2 DUMMY FILL CONCEPT;164
5.2.3;8.3 ALGORITHMS FOR METAL FILL;166
5.2.4;X;167
5.2.5;Y;167
5.2.6;8.4 DUMMY FILL FOR STI CMP AND OTHER PROCESSES;169
5.2.7;8.5 SUMMARY;170
6;Part IV Statistical Circuit Design;171
6.1;9 STATISTICAL CIRCUIT ANALYSIS;172
6.1.1;9.1 CIRCUIT PARAMETERIZATION AND SIMULATION;172
6.1.2;9.2 WORST CASE ANALYSIS;185
6.1.3;9.3 STATISTICAL CIRCUIT ANALYSIS;195
6.1.4;9.4 SUMMARY;204
6.2;10 STATISTICAL STATIC TIMING ANALYSIS;206
6.2.1;10.1 BASICS OF STATIC TIMING ANALYSIS;207
6.2.2;10.2 IMPACT OF VARIABILITY ON TRADITIONAL STATIC TIMING VERIFICATION;210
6.2.3;10.3 STATISTICAL TIMING EVALUATION;216
6.2.4;10.4 STATISTICAL GATE LIBRARY CHARACTERIZATION;239
6.2.5;10.5 SUMMARY;242
6.3;11 LEAKAGE VARIABILITY AND JOINT PARAMETRIC YIELD;243
6.3.1;11.1 LEAKAGE VARIABILITY MODELING;243
6.3.2;11.2 JOINT POWER AND TIMING PARAMETRIC YIELD ESTIMATION;247
6.3.3;11.3 SUMMARY;253
6.4;12 PARAMETRIC YIELD OPTIMIZATION;255
6.4.1;12.1 LIMITATIONS OF TRADITIONAL OPTIMIZATION FOR YIELD IMPROVEMENT;255
6.4.2;12.2 STATISTICAL TIMING YIELD OPTIMIZATION;261
6.4.3;12.3 TECHNIQUES FOR TIMING AND POWER YIELD IMPROVEMENT;272
6.4.4;12.4 SUMMARY;281
6.5;13 CONCLUSIONS;282
6.5.1;On semiconductor physics and technology;282
6.5.2;On lithography and reticle enhancement techniques;283
6.5.3;On circuit simulation;283
6.5.4;On timing analysis;283
6.5.5;On design for yield;283
7;A APPENDIX: PROJECTING VARIABILITY;284
7.1;Methodology of Predictions;285
7.2;Decomposition into Spatial Scales;287
7.3;How to Interpret and Use the Roadmap;288
7.4;Projecting CD Variability: A Case Study;289
8;References;293
9;Index;311