Buch, Englisch, 224 Seiten, Format (B × H): 164 mm x 243 mm, Gewicht: 433 g
Reihe: Chapman & Hall/CRC Computer and Information Science Series
Buch, Englisch, 224 Seiten, Format (B × H): 164 mm x 243 mm, Gewicht: 433 g
Reihe: Chapman & Hall/CRC Computer and Information Science Series
ISBN: 978-1-58488-741-6
Verlag: Chapman and Hall/CRC
Rapid energy estimation for energy efficient applications using field-programmable gate arrays (FPGAs) remains a challenging research topic. Energy dissipation and efficiency have prevented the widespread use of FPGA devices in embedded systems. Helping overcome these challenges, this book offers solutions for the development of energy efficient applications using FPGAs. It provides a framework for high-level hardware-software application development, describes energy performance modeling for reconfigurable system-on-chip devices, and explores energy efficient designs for various applications. The authors present a two-step rapid energy estimation technique that enables high-level design space exploration and offer a hardware-software design for energy efficient implementations of operating systems.
Zielgruppe
Professional
Autoren/Hrsg.
Fachgebiete
- Mathematik | Informatik EDV | Informatik Programmierung | Softwareentwicklung Software Engineering
- Mathematik | Informatik Mathematik Mathematik Allgemein
- Mathematik | Informatik EDV | Informatik Informatik Rechnerarchitektur
- Technische Wissenschaften Elektronik | Nachrichtentechnik Nachrichten- und Kommunikationstechnik Drahtlostechnologie
Weitere Infos & Material
Introduction. Reconfigurable Hardware. A High-Level Hardware-Software Application Development Framework. Energy Performance Modeling and Energy Efficient Mapping for a Class of Applications. High-Level Rapid Energy Estimation and Design Space Exploration. Hardware-Software Co-Design for Energy Efficient Implementations of Operating Systems. Concluding Remarks and Future Directions. References.