Singhee / Rutenbar | Extreme Statistics in Nanoscale Memory Design | E-Book | www.sack.de
E-Book

E-Book, Englisch, 246 Seiten

Reihe: Integrated Circuits and Systems

Singhee / Rutenbar Extreme Statistics in Nanoscale Memory Design


1. Auflage 2010
ISBN: 978-1-4419-6606-3
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 246 Seiten

Reihe: Integrated Circuits and Systems

ISBN: 978-1-4419-6606-3
Verlag: Springer
Format: PDF
Kopierschutz: 1 - PDF Watermark



Knowledge exists: you only have to ?nd it VLSI design has come to an important in?ection point with the appearance of large manufacturing variations as semiconductor technology has moved to 45 nm feature sizes and below. If we ignore the random variations in the manufacturing process, simulation-based design essentially becomes useless, since its predictions will be far from the reality of manufactured ICs. On the other hand, using design margins based on some traditional notion of worst-case scenarios can force us to sacri?ce too much in terms of power consumption or manufacturing cost, to the extent of making the design goals even infeasible. We absolutely need to explicitly account for the statistics of this random variability, to have design margins that are accurate so that we can ?nd the optimum balance between yield loss and design cost. This discontinuity in design processes has led many researchers to develop effective methods of statistical design, where the designer can simulate not just the behavior of the nominal design, but the expected statistics of the behavior in manufactured ICs. Memory circuits tend to be the hardest hit by the problem of these random variations because of their high replication count on any single chip, which demands a very high statistical quality from the product. Requirements of 5-6s (0.

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1;Extreme Statistics in Nanoscale Memory Design;3
1.1;Preface;5
1.2;Contents;7
1.3;Contributors;9
1.4;Chapter 1: Introduction;11
1.4.1;1.1 Yield-Driven Design: Need for Accurate Yield Estimation;11
1.4.2;1.2 The Case of High-Replication Circuits;12
1.4.3;1.3 Why Does Standard Monte Carlo Not Work?;13
1.4.3.1;1.3.1 Process Variation Statistics: Prerequisites for Statistical Analysis;14
1.4.3.2;1.3.2 Monte Carlo Simulation;14
1.4.3.3;1.3.3 The Problem with Memories;15
1.4.4;1.4 An Overview of This Book;15
1.4.5;References;18
1.5;Chapter 2: Extreme Statistics in Memories;19
1.5.1;2.1 Cell Failure Probability: An Extreme Statistic;19
1.5.1.1;2.1.1 Units of Failure Probability;21
1.5.1.2;2.1.2 An Example of Extreme Statistics in Memories;21
1.5.2;2.2 Incorporating Redundancy;22
1.5.2.1;2.2.1 The Poisson Yield Model;23
1.5.2.1.1;2.2.1.1 An Example: Quantifying Fault Tolerance with Statistical Analysis;24
1.5.3;Reference;25
1.6;Chapter 3: Statistical Nano CMOS Variability and Its Impact on SRAM;26
1.6.1;3.1 Introduction;26
1.6.2;3.2 Process Variability Classification;28
1.6.3;3.3 Sources of Statistical Variability;30
1.6.4;3.4 Statistical Aspects of Reliability;31
1.6.5;3.5 Gate Leakage Variability;35
1.6.6;3.6 Simulation of Statistical Variability;36
1.6.7;3.7 Simulation of Statistical Reliability;39
1.6.8;3.8 Variability in Future Technology Generations;42
1.6.9;3.9 Compact Model Strategies for Statistical Variability;47
1.6.10;3.10 Basics of Statistical Circuit Simulations in the Presence of Statistical Variability;51
1.6.11;3.11 Conclusions;55
1.6.12;References;56
1.7;Chapter 4: Importance Sampling-Based Estimation: Applications to Memory Design;59
1.7.1;4.1 Introduction;59
1.7.2;4.2 Statistical Sampling;60
1.7.2.1;4.2.1 Probability and Statistics: A History in the Making;60
1.7.2.2;4.2.2 Overview of Sampling Methods;60
1.7.2.3;4.2.3 Random Sample Generation;61
1.7.2.3.1;4.2.3.1 Pseudo-Random Number Generation;61
1.7.2.3.2;4.2.3.2 Generating Normally Distributed Random Numbers;62
1.7.2.3.3;4.2.3.3 Box-Muller Approach;63
1.7.2.3.4;4.2.3.4 Ziggurat Method;64
1.7.2.3.5;4.2.3.5 Generating Samples from Multi-Variate Gaussian Distributions;65
1.7.2.3.6;4.2.3.6 Correlated Gaussian Random Variables;66
1.7.3;4.3 Monte Carlo Methods;67
1.7.3.1;4.3.1 The Beginning;68
1.7.3.2;4.3.2 Numerical Integration;68
1.7.3.2.1;4.3.2.1 Deterministic Methods;68
1.7.3.2.2;4.3.2.2 Curse of Dimensionality and Need for Monte Carlo Integration;70
1.7.3.2.3;4.3.2.3 Latin Hypercube Sampling;71
1.7.3.3;4.3.3 Statistical Inference;71
1.7.3.3.1;4.3.3.1 Mean and Variance;72
1.7.3.3.2;4.3.3.2 Confidence Intervals;74
1.7.3.3.3;4.3.3.3 Statistical Inference for Proportions (Probabilities);75
1.7.3.3.4;4.3.3.4 Statistical Inference for Frequencies;77
1.7.3.3.5;4.3.3.5 Reliability Engineering and Monte Carlo: Acceptance Space Complexity;79
1.7.3.3.6;4.3.3.6 Resampling: Cross-Validation and Bootstrapping;80
1.7.3.4;4.3.4 Rare Event Estimation and Monte Carlo;82
1.7.4;4.4 Variance Reduction and Importance Sampling;84
1.7.4.1;4.4.1 An Overview of Variance Reduction Methods;84
1.7.4.1.1;4.4.1.1 Control Variates;84
1.7.4.1.2;4.4.1.2 Antithetic Variates;85
1.7.4.1.3;4.4.1.3 Quasi-Monte Carlo Methods;85
1.7.4.1.4;4.4.1.4 Stratified Sampling;88
1.7.4.2;4.4.2 Importance Sampling;88
1.7.4.2.1;4.4.2.1 Integrated Importance Sampling;90
1.7.4.2.2;4.4.2.2 Ratio and Regression Estimates;91
1.7.4.2.3;4.4.2.3 Variance and Confidence Intervals;91
1.7.4.2.4;4.4.2.4 Exponential Change of Measure;92
1.7.5;4.5 Importance Sampling for Memory Design;92
1.7.5.1;4.5.1 The Importance Sampling Distribution;92
1.7.5.1.1;4.5.1.1 Shifted Mean Estimation;94
1.7.5.1.2;4.5.1.2 Theoretical Application;95
1.7.5.2;4.5.2 SRAM Application;97
1.7.5.2.1;4.5.2.1 Dynamic Stability and Writability for PD/SOI Designs;98
1.7.5.2.2;4.5.2.2 Yield Analysis;98
1.7.5.2.3;4.5.2.3 Effects of Supply Fluctuation;100
1.7.6;4.6 Conclusions;102
1.7.7;References;103
1.8;Chapter 5: Direct SRAM Operation Margin Computation with Random Skews of Device Characteristics;105
1.8.1;5.1 Introduction;105
1.8.2;5.2 General Metrics for SRAM Operation Margins;106
1.8.3;5.3 Idealization of Statistical Chaos in Single Variable;109
1.8.4;5.4 Formulation of the Direct Computation for SRAM Margins;110
1.8.5;5.5 Example ADM and WRM Computation;115
1.8.6;5.6 Extending DC Computation to Transient Operations;118
1.8.7;5.7 Unstable SRAM Cells at High Vdd and High Beta Ratio;121
1.8.8;5.8 Write Fail from New Floating Bodies;124
1.8.9;5.9 General Transient Margin Computation Sequence and DC Margin Bias Setting;125
1.8.10;5.10 Thinner Tinv to Mitigate Floating Body Effects Which Degrade SRAM Stability;127
1.8.11;5.11 SRAM Wear and Tear from NBTI and PBTI;128
1.8.12;5.12 SRAM Vmax Problem from DIBL;133
1.8.13;5.13 Getting Around Curvatures of Metric Gradients;135
1.8.14;5.14 Conclusion and Acknowledgment;141
1.8.15;Appendix: SRAM Margins to Meet Yield Targets;143
1.8.16;References;143
1.9;Chapter 6: Yield Estimation by Computing Probabilistic Hypervolumes;145
1.9.1;6.1 Introduction: Parameter Variations and Yield Estimation;145
1.9.1.1;6.1.1 Yield Estimation;147
1.9.1.2;6.1.2 An Example: SRAM Read Access Failure;149
1.9.2;6.2 Approaches to Yield Estimation;151
1.9.2.1;6.2.1 Statistical Methods;152
1.9.2.1.1;6.2.1.1 Monte-Carlo Methods;152
1.9.2.1.2;6.2.1.2 Improved Monte-Carlo Methods;154
1.9.2.2;6.2.2 Deterministic/Mixed Methods;154
1.9.2.2.1;6.2.2.1 Yield Estimation by Simplicial Approximation;155
1.9.2.2.2;6.2.2.2 Yield Estimation by Worst-Case Distance Approximation;156
1.9.2.2.3;6.2.2.3 Yield Estimation by Ellipsoidal Approximation;158
1.9.2.2.4;6.2.2.4 Yield Estimation by Euler-Newton Curve Tracing;159
1.9.2.2.5;6.2.2.5 YENSS Sampling;160
1.9.2.2.6;6.2.2.6 Normal Boundary Intersection: The Reverse Problem;161
1.9.3;6.3 Computing the Boundary and Probabilistic Hypervolumes;162
1.9.3.1;6.3.1 Basic Idea and Geometrical Explanation;162
1.9.3.1.1;6.3.1.1 Extension to Multiple Parameters;162
1.9.3.1.2;6.3.1.2 Extension to Multiple Constraints;163
1.9.3.1.3;6.3.1.3 Extension to Handling Probability Distributions;163
1.9.3.1.4;6.3.1.4 Extension to Handling Correlations of Parameters;166
1.9.3.2;6.3.2 YENSS Algorithm Outline;168
1.9.3.3;6.3.3 Implicit Formulation for the Boundary;170
1.9.3.3.1;6.3.3.1 SRAM Read Access Time;170
1.9.3.3.2;6.3.3.2 SRAM Static Noise Margin while Holding Data;171
1.9.3.4;6.3.4 Solving for the Boundary Using Line Search;171
1.9.3.4.1;6.3.4.1 Dealing with Multiple Performance Constraints;175
1.9.3.5;6.3.5 Solving for the Boundary Using Moore-Penrose Pseudo-Inverse Newton-Raphson;176
1.9.3.6;6.3.6 Calculating the Jacobian Matrix Using Sensitivity Analysis;176
1.9.3.6.1;6.3.6.1 Transient Simulation Based Sensitivity Evaluation;177
1.9.3.7;6.3.7 Adaptive Hypervolume Refinement and Error Estimation;178
1.9.3.7.1;6.3.7.1 Analytical Formula to Compute the Hypervolume;178
1.9.3.7.2;6.3.7.2 Yield Hypervolume Calculation and Error Control;178
1.9.4;6.4 Examples and Comparisons;179
1.9.4.1;6.4.1 An Illustrative Example of YENSS;179
1.9.4.2;6.4.2 Application to SRAM Read Access Failure;180
1.9.5;6.5 Summary;182
1.9.6;References;183
1.10;Chapter 7: Most Probable Point-Based Methods;186
1.10.1;7.1 Introduction;186
1.10.2;7.2 Linear Limit-State Functions with Normally Distributed Random Variables;188
1.10.3;7.3 First Order Reliability Method;191
1.10.4;7.4 Second-Order Reliability Method;200
1.10.5;7.5 Other Topics of the MPP-Based Methods;205
1.10.5.1;7.5.1 Dependent Random Variables;205
1.10.5.2;7.5.2 MPP-Based Monte Carlo Simulation;205
1.10.5.3;7.5.3 MPP-Based Methods in the Original X-Space;206
1.10.6;7.6 Conclusions;207
1.10.7;References;208
1.11;Chapter 8: Extreme Value Theory: Application to Memory Statistics;210
1.11.1;8.1 Introduction;210
1.11.1.1;8.1.1 Design Margin and Memory;210
1.11.2;8.2 Extremes: Tails and Maxima;214
1.11.2.1;8.2.1 Sample Maximum: Limiting Distributions;215
1.11.2.2;8.2.2 Distribution Tail: Limiting Distributions;217
1.11.3;8.3 Analysis of Tails and Extreme Values;218
1.11.3.1;8.3.1 Order Statistics and Quantiles;218
1.11.3.1.1;8.3.1.1 Order Statistics;218
1.11.3.1.2;8.3.1.2 Quantiles;219
1.11.3.2;8.3.2 Mean Excess Plot;220
1.11.4;8.4 Estimating the Tail: Fitting the GPD to Data;221
1.11.4.1;8.4.1 Maximum Likelihood Estimation;222
1.11.4.2;8.4.2 Probability-Weighted Moment Matching;223
1.11.5;8.5 Statistical Blockade: Sampling Rare Events;225
1.11.5.1;8.5.1 Unbiasing the Classifier;227
1.11.5.2;8.5.2 Note on Sampling and Commercially Available Device Models;228
1.11.5.3;8.5.3 Example: 6T SRAM Cell;228
1.11.5.4;8.5.4 Conditionals and Disjoint Tail Regions;231
1.11.5.4.1;8.5.4.1 The Solution;232
1.11.5.5;8.5.5 Extremely Rare Events and Their Statistics;234
1.11.5.6;8.5.6 A Recursive Formulation of Statistical Blockade;235
1.11.5.6.1;8.5.6.1 An Experiment with Data Retention Voltage;236
1.11.6;8.6 Combining Effects Across a Memory;239
1.11.6.1;8.6.1 Subsystem Results: Bit Cells Connected to a Given Sense Amplifier;239
1.11.6.2;8.6.2 Generalizing to a Full Memory;241
1.11.6.2.1;8.6.2.1 Method 1 (Isolated);242
1.11.6.2.2;8.6.2.2 Method 2 (Merged);242
1.11.6.3;8.6.3 Generalization to Multiple Memories;245
1.11.7;8.7 Conclusions;245
1.11.8;References;246
1.12;Index;248



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