E-Book, Englisch, 211 Seiten
Vigilante / Reynaert 5G and E-Band Communication Circuits in Deep-Scaled CMOS
1. Auflage 2018
ISBN: 978-3-319-72646-5
Verlag: Springer Nature Switzerland
Format: PDF
Kopierschutz: 1 - PDF Watermark
E-Book, Englisch, 211 Seiten
Reihe: Analog Circuits and Signal Processing
ISBN: 978-3-319-72646-5
Verlag: Springer Nature Switzerland
Format: PDF
Kopierschutz: 1 - PDF Watermark
This book discusses design techniques, layout details and measurements of several key analog building blocks that currently limit the performance of 5G and E-Band transceivers implemented in deep-scaled CMOS. The authors present recent developments in low-noise quadrature VCOs and tunable inductor-less frequency dividers. Moreover, the design of low-loss broadband transformer-based filters that realize inter-stage matching, power division/combining and impedance transformation is discussed in great detail. The design and measurements of a low-noise amplifier, a downconverter and a highly-linear power amplifier that leverage the proposed techniques are shown. All the prototypes were realized in advanced nanometer scaled CMOS technologies without RF thick to metal option.
Marco Vigilante (S'14-M'17) was born in Carpi, Italy, in 1988. He received the B.S. and M.S. degrees in electrical engineering from Università di Modena, Modena, Italy, in 2010 and 2012, and the Ph.D. degree from the University of Leuven (KU Leuven), Leuven, Belgium, in 2017. He is currently working as a research assistant at the MICAS laboratories of the KU Leuven in the field of high performance analog building blocks for mm-Wave transceivers designed in deep-scaled CMOS. Mr. Vigilante was the recipient of the IEEE Solid-State Circuits Society Predoctoral Achievement Award for 2016-2017 and the 2017 IEEE RFIC Symposium Best Student Paper Award-3rd Place.Patrick Reynaert was born in Wilrijk, Belgium, in 1976. He received the Master of Industrial Sciences in Electronics (ing.) from the Karel de Grote Hogeschool, Antwerpen, Belgium in 1998 and both the Master of Electrical Engineering (ir.) and the Ph.D. in Engineering Science (dr.) from the Katholieke Universiteit Leuven (K.U.Leuven), Belgium in 2001 and 2006 respectively. From 2001 to 2006, he was a Teaching and Research Assistant within the MICAS research group of the Department of Electrical Engineering (ESAT), K.U.Leuven, Belgium. While working towards his Ph.D. degree, his main research focus was on CMOS RF power amplifiers and analog circuit design for mobile and wireless communications. From 2001 to 2006, he was also a Lector at ACE-Group T Leuven, Belgium where he taught several undergraduate courses on electronic circuit design. During 2006-2007, he was a post-doctoral researcher at the Department of Electrical Engineering and Computer Sciences of the University of California at Berkeley. At the Berkeley Wireless Research Center, he was working on mm-wave CMOS integrated circuits within the group of Prof. Ali Niknejad. For this research, he received a Francqui Foundation fellowship from the Belgian American Educational Foundation. During the summer of 2007, he was a visiting researcher at Infineon, Villach, Austria where he worked on the linearization of basestation power amplifiers. Since October 2007, he is a Professor at KU Leuven, department of Electrical Engineering (ESAT) and a staff member of the ESAT-MICAS research group. His main research interests include mm-wave and sub-THz CMOS circuit design and RF power amplifiers. Patrick Reynaert is a Senior Member of the IEEE and chair of the IEEE SSCS Benelux Chapter. He serves or has served on the technical program committees of several international conferences including the ISSCC-SRP, IEDM, ESSCIRC, RFIC and PRIME. He has served as Associate Editor for TCAS-I and as Guest Editor for JSSC. In 2011, he received the TSMC-Europractice Innovation Award. He is co-recipient of the ESSCIRC-2011 Best Paper Award. In 2014, he received the 2nd prize of the Bell Labs Prize.
Autoren/Hrsg.
Weitere Infos & Material
1;Preface;6
2;Contents;8
3;1 Introduction;12
3.1;1.1 Towards 5G and IoT;12
3.2;1.2 mm-Wave Spectrum, Challenges and Opportunities;13
3.3;1.3 System Level Requirements for mm-Wave Wireless Links;16
3.3.1;1.3.1 Free Space Loss and Beamforming;17
3.3.2;1.3.2 Impairments Model;18
3.3.3;1.3.3 Link Budget Design Examples;29
3.4;1.4 Outline of This Book;32
3.5;References;34
4;2 Gm Stage and Passives in Deep-Scaled CMOS;36
4.1;2.1 Gm Stage: MOS as a Transconductor;36
4.1.1;2.1.1 DC Model and Regions of Operation (IDS);37
4.1.2;2.1.2 AC Model, Gain (gm) and Speed (ft, fMAX);38
4.1.3;2.1.3 Inversion Coefficient (IC) as a Design Parameter;39
4.1.4;2.1.4 Effect of Scaling;39
4.2;2.2 Effect of Scaling on Integrated Passives;41
4.2.1;2.2.1 MOS Transistor as a Switch;41
4.2.2;2.2.2 Capacitors;42
4.2.3;2.2.3 Inductors;42
4.2.4;2.2.4 Transformers;44
4.2.5;2.2.5 Transmission Lines;45
4.3;2.3 Conclusion;47
4.4;References;47
5;3 Gain-Bandwidth Enhancement Techniques for mm-Wave Fully-Integrated Amplifiers;49
5.1;3.1 RLC Tank;49
5.1.1;3.1.1 RC Low-Pass Filter;49
5.1.2;3.1.2 RLC Band-Pass Filter;50
5.2;3.2 Coupled Resonators;51
5.2.1;3.2.1 Bode-Fano Limit;51
5.2.2;3.2.2 Capacitively Coupled Resonators;53
5.2.3;3.2.3 Inductively Coupled Resonators;54
5.2.4;3.2.4 Magnetically Coupled Resonators;55
5.2.5;3.2.5 Magnetically and Capacitively Coupled Resonators;56
5.2.6;3.2.6 Coupled Resonators Comparison;57
5.3;3.3 Transformer-Based Resonators;58
5.3.1;3.3.1 On the Parasitic Interwinding Capacitance;58
5.3.2;3.3.2 Effect of Unbalanced Capacitive Terminations;61
5.3.3;3.3.3 Frequency Response Equalization;62
5.3.4;3.3.4 On the Parasitic Magnetic Coupling in Multistage Amplifiers;64
5.3.5;3.3.5 Extension to Impedance Transformation;65
5.3.6;3.3.6 On the kQ Product;66
5.3.7;3.3.7 Transformer-Based Power Dividers;68
5.3.8;3.3.8 Transformer-Based Power Combiners;69
5.4;3.4 Conclusion;69
5.5;References;70
6;4 mm-Wave LC VCOs;72
6.1;4.1 LC VCOs Basics;73
6.1.1;4.1.1 Negative Gm Model;73
6.1.2;4.1.2 A General Result on Phase Noise;75
6.1.3;4.1.3 More on Flicker Noise Upconversion and 2nd Order Effects;77
6.1.4;4.1.4 Distributed Oscillators;80
6.1.5;4.1.5 FOM and Challenges @mm-Wave;82
6.2;4.2 Tuning Extension Techniques;84
6.2.1;4.2.1 Varactors;85
6.2.2;4.2.2 Switched Capacitors;85
6.2.3;4.2.3 Switched Inductors;86
6.2.4;4.2.4 Switched TLs;87
6.2.5;4.2.5 4th Order Tanks and Other Techniques;88
6.3;4.3 Design Example: A Dual-Band Transformer-Coupled QVCO in 28nm CMOS;88
6.3.1;4.3.1 Proposed Transformer-Coupled Quadrature VCO;89
6.3.2;4.3.2 Design Considerations at mm-Wave and Circuit Implementation;98
6.3.3;4.3.3 Measurement Results;101
6.3.4;4.3.4 Appendix;105
6.4;4.4 Conclusion;107
6.5;References;108
7;5 mm-Wave Dividers;112
7.1;5.1 Injection Locking: Operation Principle;113
7.2;5.2 High Speed Dividers;115
7.2.1;5.2.1 Injection Locked LC Dividers;115
7.2.2;5.2.2 Current-Mode Logic (CML) Dividers;117
7.3;5.3 Design Example: An Ultra-wideband Divide-by-4 in 28nm CMOS;120
7.3.1;5.3.1 Design for Maximum Locking Range and Minimum Power Consumption in the E-Band;121
7.3.2;5.3.2 Measurement Results;122
7.4;5.4 Conclusion;126
7.5;References;127
8;6 mm-Wave Broadband Downconverters;129
8.1;6.1 Receiver Architectures;129
8.2;6.2 Low-Noise Amplifiers Basics;131
8.2.1;6.2.1 Challenges @mm-Wave;131
8.2.2;6.2.2 Most Adopted Circuits;132
8.2.3;6.2.3 Cascode Limitations;136
8.2.4;6.2.4 Neutralized CS Amplifier;137
8.2.5;6.2.5 Broadband Input Match;138
8.3;6.3 Downconversion Mixers @mm-Wave;140
8.4;6.4 Design Example 1: A Wideband LNA in 28nm CMOS;141
8.4.1;6.4.1 LNA Architecture;141
8.4.2;6.4.2 Measurement Results;143
8.5;6.5 Design Example 2: A Wideband Downconverter Front-End in 28nm CMOS;147
8.5.1;6.5.1 Receiver Architecture;147
8.5.2;6.5.2 RF Mixer and Power Splitter;148
8.5.3;6.5.3 If Mixer, Baseband TIA and I/Q Generation;150
8.5.4;6.5.4 Measurement Results;150
8.6;6.6 Conclusion;156
8.7;References;157
9;7 mm-Wave Highly-Linear Broadband Power Amplifiers;160
9.1;7.1 Power Amplifiers Basics;161
9.1.1;7.1.1 Single Transistor Amplifier Under Large Signal;161
9.1.2;7.1.2 Trade-Offs in PA Design: Po, PAE and Linearity;161
9.1.3;7.1.3 Harmonic Terminations and Switching Amplifiers;163
9.1.4;7.1.4 Challenges @mm-Wave;166
9.2;7.2 Class-AB Power Amplifier @mm-Wave;167
9.2.1;7.2.1 Efficiency at Power Back-Off;168
9.2.2;7.2.2 Sources of AM-PM Distortion;170
9.2.3;7.2.3 Distortion Cancellation Techniques;173
9.3;7.3 Design Example: A Highly Linear Wideband PA in 28nm CMOS;180
9.3.1;7.3.1 Broadband Impedance Transformation;181
9.3.2;7.3.2 Transformer-Based Output Combiner and Inter-stage Power Divider;183
9.3.3;7.3.3 More on the kQ Product;186
9.3.4;7.3.4 Measurement Results;189
9.3.5;7.3.5 Appendix I;198
9.3.6;7.3.6 Appendix II;199
9.4;7.4 Conclusion;199
9.5;References;200
10;8 Conclusion;203
10.1;8.1 Summary;203
10.2;8.2 Major Contributions;204
10.3;8.3 Suggestions for Future Work;205
10.4;References;207
11;Index;209




