Xing / Zhu / Gielen Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems

1. Auflage 2018
ISBN: 978-3-319-66565-8
Verlag: Springer Nature Switzerland
Format: PDF
Kopierschutz: 1 - PDF Watermark

E-Book, Englisch, 200 Seiten

Reihe: Signals and Communication Technology

This book discusses both architecture- and circuit-level design aspects of voltage-controlled-oscillator (VCO)-based analog-to-digital converters (ADCs), especially focusing on mitigation of VCO nonlinearity and the improvement of power efficiency. It shows readers how to develop power-efficient complementary-metal-oxide-semiconductor (CMOS) ADCs for applications such as LTE, 802.11n, and VDSL2+. The material covered can also be applied to other specifications and technologies. Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems begins with a general introduction to the applications of an ADC in communications systems and the basic concepts of VCO-based ADCs. The text addresses a wide range of converter architectures including open- and closed-loop technologies. Special attention is paid to the replacement of power-hungry analog blocks with VCO-based circuits and to the mitigation of VCO nonlinearity. Various MATLAB®/Simulink® models are provided for important circuit nonidealities, allowing designers and researchers to determine the required specifications for the different building blocks that form the systematic integrated-circuit design procedure. Five different VCO-based ADC design examples are presented, introducing innovations at both architecture and circuit levels. Of these designs, the best power efficiency of a high-bandwidth oversampling ADC is achieved in a 40 nm CMOS demonstration. This book is essential reading material for engineers and researchers working on low-power-analog and mixed-signal design and may be used by instructors teaching advanced courses on the subject. It provides a clear overview and comparison of VCO-based ADC architectures and gives the reader insight into the most important circuit imperfections.

Prof. Xinpeng Xing received his Bachelor and Master degrees both in Electronics Engineering from Beijing University of Aeronautics and Astronautics and Tsinghua University respectively. In October 2013, He is granted with PhD degree in engineering in KU Leuven, his doctor thesis is about design of high-bandwidth low-power Delta-Sigma Modulators. Now he is an assistant professor at Graduate School at Shenzhen, Tsinghua University, and his research interest is analog, mixed-mode, RF integrated circuits design.Georges G.E. Gielen Has been a  Full Professor at Katholieke Universiteit Leuven since 2000 and, since August 2012, has served as Chair of the Department of Electrical Engineering. He is also the Chair of the Leuven ICT research center, and the PI coordinator of the Leuven CHIPS Center of Excellence.His research interests are in the design of analog and mixed-signal integrated circuits, and especially in analog and mixed-signal CAD tools and design automation (modeling, simulation and symbolic analysis, analog synthesis, analog layout generation, analog and mixed-signal testing). He is coordinator or partner of several (industrial) research projects in this areas. He has authored or coauthored 7 books and more than 450 papers in edited books, international journals and conference proceedings. He is regularly a member of the Program Committees of international conferences, having served as General Chair of the DATE conference in 2006 and of the ICCAD conference in 2007. He serves regularly as member of editorial boards of international journals (IEEE Transactions on Circuits and Systems, IEEE Transactions on Computer-Aided Design, Springer International Journal on Analog Integrated Circuits and Signal Processing, Elsevier Integration). He received the 1995 Best Paper Award in the John Wiley international journal on Circuit Theory and Applications, and was the 1997 Laureate of the Belgian Royal Academy on Sciences, Literature and Arts in the discipline of Engineering. He received the 2000 Alcatel Award from the Belgian National Fund of Scientific Research for his innovative research in telecommunications, and won the DATE 2004 conference Best Paper Award. He served as appointed member of the Board of Governors of the IEEE Council on Electronic Design Automation, and as Chairman of the IEEE Benelux CAS Chapter. He served as the President of the IEEE Circuits and Systems Society in 2005, and as Chair of the IEEE Benelux Section in 2009-2011. He is the Chair of EDAA. He was elected DATE Fellow in 2007, and received the IEEE Computer Society Outstanding Contribution Award and the IEEE Circuits and Systems Society Meritorious Service Award in 2007. He is a Fellow of the IEEE.

Autoren/Hrsg.

Xing, Xinpeng

Zhu, Peng

Gielen, Georges

Inhaltsverzeichnis

1;Preface;7
2;Acknowledgements;9
3;Contents;10
4;Abbreviations;14
5;List of Figures;18
6;List of Tables;25
7;1 Introduction;26
7.1;1.1 Background and Motivation;26
7.1.1;1.1.1 Communication Evolution;26
7.1.2;1.1.2 CMOS Technology;28
7.1.3;1.1.3 Wireless Receiver Architectures;31
7.2;1.2 The Research Objective of the Book;33
7.3;1.3 The Book Organization;34
7.4;References;35
8;2 A/D Converters and Applications;37
8.1;2.1 Introduction;37
8.2;2.2 ADC Specifications;38
8.2.1;2.2.1 ADC Speed;38
8.2.2;2.2.2 ADC Accuracy;38
8.2.3;2.2.3 ADC FoM;40
8.3;2.3 ADC Architectures;40
8.3.1;2.3.1 Flash ADC;43
8.3.2;2.3.2 Two-Step ADC;45
8.3.3;2.3.3 Pipelined ADC;46
8.3.4;2.3.4 SAR ADC;47
8.3.5;2.3.5 Delta-Sigma ADC;48
8.3.6;2.3.6 ADC Architecture Summmary and Comparison;50
8.4;2.4 Application of ADC in Communications;52
8.5;2.5 Conclusions;57
8.6;References;58
9;3 Continuous-Time Delta-Sigma Modulators;60
9.1;3.1 Introduction;60
9.2;3.2 DSM Basics: Oversampling and Noise-Shaping;61
9.3;3.3 DSM Structures;64
9.3.1;3.3.1 Discrete-Time and Continuous-Time DSMs;64
9.3.2;3.3.2 1st-Order and Higher-Order DSMs;67
9.3.3;3.3.3 Single-Loop and MASH DSMs;68
9.3.4;3.3.4 The ??-0 and 0-?? MASH Structures;69
9.3.5;3.3.5 Single-Bit and Multi-bit DSMs;71
9.3.6;3.3.6 Feedforward, Feedback and Hybrid DSMs;73
9.3.7;3.3.7 Resonator;75
9.3.8;3.3.8 Feedin Paths;76
9.4;3.4 CT DSM Nonidealities and Modeling;76
9.4.1;3.4.1 Loop Filter Nonidealities and Modeling;77
9.4.2;3.4.2 DAC Nonidealities and Modelling;82
9.4.3;3.4.3 Quantizer Nonidealities and Modeling;86
9.5;3.5 Conclusions;87
9.6;References;88
10;4 VCO-Based ADCs;90
10.1;4.1 Introduction;90
10.2;4.2 VCO-Based Quantizers;91
10.2.1;4.2.1 Single-Phase Counting VCO-Based Quantizer;91
10.2.2;4.2.2 Multi-phase Counting VCO-Based Quantizer;91
10.2.3;4.2.3 Frequency-Type VCO-Based Quantizer;92
10.2.4;4.2.4 Phase-Type VCO-Based Quantizer;95
10.3;4.3 Closed-Loop VCO-Based DSMs;95
10.3.1;4.3.1 DSM with Frequency-Type VCO-Based Quantizer;96
10.3.2;4.3.2 DSM with Phase-Type VCO-Based Quantizer;97
10.3.3;4.3.3 DSM with Residual-Cancelling VCO-Based Quantizer;97
10.4;4.4 Open-Loop VCO-Based ADCs;99
10.4.1;4.4.1 VCO-Based ADC with Background Digital Calibration;99
10.4.2;4.4.2 VCO-Based ADC with Counting and Foreground Digital Calibration;100
10.4.3;4.4.3 VCO-Based ADC with PWM Precoding;101
10.5;4.5 Conclusions;103
10.6;References;103
11;5 CT DSM ADCs with VCO-Based Quantization;105
11.1;5.1 Introduction;105
11.2;5.2 A 40MHz-BW 12-Bit CT DSM with Digital Calibration and Shaped SC DAC;106
11.2.1;5.2.1 Structure of the CT DSM;106
11.2.2;5.2.2 Delta-Sigma Modulator Building Blocks Design;111
11.2.3;5.2.3 Measurement Setup and Experimental Results;117
11.3;5.3 A 40MHz-BW 12-Bit CT DSM with Capacitive Local Feedback and Current-Sharing OTA;119
11.3.1;5.3.1 System Design of the 40MHz 12-Bit CT DSM;121
11.3.2;5.3.2 Circuit Design of the DSM Building Blocks;123
11.3.3;5.3.3 Measurement Results and Discussions;126
11.4;5.4 Conclusions;128
11.5;References;129
12;6 Two-Step Open-Loop VCO-Based ADC;131
12.1;6.1 Introduction;131
12.2;6.2 Architecture Design of Two-Step Open-Loop VCO-Based ADC;132
12.2.1;6.2.1 A Two-Step Open-Loop VCO-Based ADC Architecture;132
12.2.2;6.2.2 Nonidealities of the Two-Step Open-Loop VCO-Based ADC;135
12.3;6.3 Circuit Implementation of the Two-Step Open-Loop VCO-Based ADC;138
12.3.1;6.3.1 VCO-Based Quantizer Design;139
12.3.2;6.3.2 DAC and Subtractor Design;141
12.4;6.4 Experimental Results and Discussions;144
12.5;6.5 Conclusions;146
12.6;References;147
13;7 VCO-Based 0-?? MASH ADC;148
13.1;7.1 Introduction;148
13.2;7.2 Architecture Analysis of the 0-?? MASH VCO-Based ADC;149
13.2.1;7.2.1 0-?? MASH VCO-Based ADC;149
13.2.2;7.2.2 Nonlinearity-Cancellation Robustness Against PVT Variations;152
13.2.3;7.2.3 System Architecture of a 0--2 MASH VCO-Based ?? ADC;153
13.2.4;7.2.4 Delay Matching Technique;155
13.3;7.3 Circuit Implementation of the 0--2 MASH VCO-Based ?? ADC;157
13.3.1;7.3.1 Three-Input Adder;157
13.3.2;7.3.2 VCO-Based Quantizer;158
13.3.3;7.3.3 Integrator;160
13.3.4;7.3.4 DACs;162
13.3.5;7.3.5 Interface;163
13.4;7.4 Experimental Results;164
13.5;7.5 Conclusions;171
13.6;References;171
14;8 Fully-VCO-Based High-Order ?? ADC;173
14.1;8.1 Introduction;173
14.2;8.2 Integrators;173
14.2.1;8.2.1 Traditional Analog Integrator;173
14.2.2;8.2.2 VCO-Based Integrator;175
14.2.3;8.2.3 Fully-VCO-Based ?? ADC Structure;177
14.3;8.3 Design Example: A Fully-VCO-Based 0-2 MASH VCO-Based ?? ADC;178
14.3.1;8.3.1 System Architecture;178
14.3.2;8.3.2 Circuit Implementation;180
14.3.3;8.3.3 Experimental Results;183
14.4;8.4 Conclusions;191
14.5;References;191
15;9 Conclusions;192
15.1;9.1 Summary and Conclusions;192
15.2;9.2 Suggestions for Future Work;194
15.3;References;197
16;Index;198