E-Book, Englisch, 713 Seiten, eBook
Reihe: Texts in Computer Science
Dandamudi Introduction to Assembly Language Programming
2. Auflage 2005
ISBN: 978-0-387-27155-2
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark
For Pentium and RISC Processors
E-Book, Englisch, 713 Seiten, eBook
Reihe: Texts in Computer Science
ISBN: 978-0-387-27155-2
Verlag: Springer US
Format: PDF
Kopierschutz: 1 - PDF Watermark
Zielgruppe
Lower undergraduate
Autoren/Hrsg.
Weitere Infos & Material
Overview.- Basic Computer Organization.- Pentium Assembly Language.- The Pentium Processor.- Overview of Assembly Language.- Procedures and the Stack.- Addressing Modes.- Arithmetic Flags and Instructions.- Selection and Iteration.- Logical and Bit Operations.- String Processing.- ASCII and BCD Arithmetic.- MIPS Assembly Language.- MIPS Processor.- MIPS Assembly Language.- Interrupt Processing.- Protected-Mode Interrupt Processing.- Real-Mode Interrupts.- Advanced Topics.- Recursion.- High-Level Language Interface.- Floating-Point Operations.
Chapter 3
The Pentium Processor (p. 47)
Objectives
• To describe the basic organization of the Pentium processor
• To introduce the Pentium protected-mode memory architecture
• To discuss the real-mode memory organization
We discussed processor design space in the last chapter. Now we look at the Pentium processor details. We present details of its registers and memory architecture. Other Pentium details are discussed in later chapters.
We start our discussion with a brief history of the Intel architecture. This architecture encompasses the X86 family of processors. All these processors, including the Pentium, belong to the CISC category. Section 3.2 presents the internal register details of the Pentium processor. Even though the Pentium is a 32-bit processor, it maintains backward compatibility to the earlier 16-bit processors. The next two sections describe the protected- and real-mode memory architectures. Protected-mode architecture is the native mode for the Pentium processor. The real mode is provided to mimic the 16-bit 8086 memory architecture. In both modes, the Pentium supports segmented memory architecture. In the protected mode, it also supports paging to facilitate implementation of virtual memory. It is important for an assembly language programmer to understand the segmented memory organization supported by the Pentium. We conclude the chapter with a summary.
3.1 The Pentium Processor Family
Intel introduced microprocessors way back in 1969. Their first 4-bit microprocessor was the 4004. This was followed by the 8080 and 8085 microprocessors. The work on these early microprocessors led to the development of the Intel architecture (IA). The first processor in the IA family was the 8086 processor, introduced in 1979. It has a 20-bit address bus and a 16-bit data bus.
The 8088 is a less expensive version of the 8086 processor. The cost reduction is obtained by using an 8-bit data bus. Except for this difference, the 8088 is identical to the 8086 processor. Intel introduced segmentation with these processors.
These processors can address up to four segments of 64 KB each. This IA segmentation is referred to as the real-mode segmentation and is discussed later in this chapter. The 80186 is a faster version of the 8086. It also has a 20-bit address bus and 16-bit data bus, but has an improved instruction set. The 80186 was never widely used in computer systems. The real successor to the 8086 is the 80286, which was introduced in 1982. It has a 24-bit address bus, which implies 16 MB of memory address space. The data bus is still 16 bits wide, but the 80286 has some memory protection capabilities.
It introduced the protection mode into the IA architecture. Segmentation in this new mode is different from the real-mode segmentation. We present details on this new segmentation later. The 80286 is backward compatible in that it can run the 8086-based software.
Intel introduced its first 32-bit processor - the 80386 - in 1985. It has a 32-bit data bus and 32-bit address bus. The memory address space has grown substantially (from 16 MB address space to 4 GB). This processor introduced paging into the IA architecture. It also allowed de.nition of segments as large as 4 GB. This effectively allowed for a ".at" model (i.e., effectively turning off segmentation). Later sections present details on this. Like the 80286, it can run all the programs written for 8086 and 8088 processors.